Commit Stage
Code File Location: VisualSim/actor/arch/Processor_Blocks
This
blocks is used to emulate the commit stage in processor architecture
model. Commit stage will takes care of the out of order completion and
check for conditional branch instructions. Commit stage will commits
the instructions in in order.
Commit
stage will receive completed instrctions and check against the head of
ROB, if the order is correct then the instructions will be released
from ROB for in order commit, otherwise the completed instructions will
be kept in hold
The following is the sequence of operation:
Out of order completion:
1. Executed instructions will be loaded and checked agains Head of ROB,
if it matches the micro op will be removed for commit, the next
instructions will be checked, the process continues as long as the
instruction is in order or the instructions are already waiting for
commit and kept in hold.
2. If the ROB was full and then the sufficient amount is released then
the commit stage will trigger the Rename stage to brake the pipeline
stall.
3. Each instructions will be moved to write back stage in D cache.
Conditional Branch Flush:
1. If there is a conditional branch then the executed information is forwared to BPU unit.
2. if the branch is taken then the branch flush will be issued to all other stages in the pipeline.
BPU unit issues the standard "Processor_DS" data structure.
| Parameter |
Explanation | Type |
Example |
| Commit_Stage_Name |
This is a unique name of this block. No other Architecture, Virtual_Machine, Scheduler or Smart_Resource can have this name in a model. The memory name is used to identify this destination. | String | "Core_1_Commit" |
| Core_Speed_Mhz | Speed of the processor core in Mhz. | Double | 1200.0 |
| D_Cache_Name |
Name of the D cache block |
String | "D_Cache" |
| Power_Manager_Name | Name of the power table, this will enable the power observation of this block with required configuration in power table. "none" will diable the power feature |
String | "Manager_1" |
| Debug_Enable |
Used for internal debugging |
Boolean |
false |
| Port | Explanation |
| Frm_Exec |
This port connects this block to the Execution stage. |
| to_Rename |
This port connects this block to the Rename stage. |
| to_Branch |
This port connects this block to the Branch predictor stage. |
| to_DCache |
This port connects this block to the D cache block. |
| ROB_Occupancy |
Provides the ROB occupancy value. |