PCI_X

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Interfaces and Buses / PCI / PCI_X
Block Name: PCI_X

Code File Location: VisualSim/actor/arch/Buses/PCI_X

Block Overview

o   The PCI, PCI-X Local bus protocol is a high performance bus for interconnecting peripheral chips to any independent processor/memory subsystems. 

Description

The PCI bus block can use as interconnect between high bandwidth peripherals closer to the CPU for performance gains. This model has been fully validated against the specification. Refer to the Bus Documentation section to see the validation details. This library component is used to assemble complex systems that contain one or more PCI buses. The default PCI comes with split-and-retry turned off and uses a First Come-First Server arbitration. The user can modify these two attributes to turn on Split-Retry and make the protocol Round-Robin. It is preferable to make this change on a per model instance basis and not in the original block implementation. To carryout this activity:

  1. Right-click on the block and select "Open Instance". 
  2. Configure PCI_X_Controller and select Split-Retry.
  3. For Round-Robin, select the Arbiter_Mode to "RR".

Preemption:  The PCI and PCIx will preempt at the transaction level and not at the burst-level.  If the user would like to preempt at the burst-level, the transaction must be fragmented into bursts before being sent into the PCI /PCI_X Bus block.  At the destination side (Slave), the bursts must be assembled before presenting to the Slave device.  This can be done by testing for the A_Bytes_Remaining field to be equal to 0.

Parameter

Explanation

Example

Architecture_Name

ArchitectureSetup that this block is associated with for routing and statistics.

"Architecture_1"

Bus_Name

Unique name for this bus in the model. it is used to generate statistics from Architecture_Setup.

“Bus_1”

Bus_Speed_Mhz

Speed of the Bus.

133.0

Bus_Width_Bytes

Set to 4 Bytes. To change the Bus Width, Open Instance and modify the Linear_Controller block to a different value.

4

Burst_Size_Bytes

Set to 64 Bytes. Determines the maximum length of a transaction. If a higher priority transaction coms, the next burst will wait until the higher priority item is transfered.

64

FIFO_Buffers_Size

Size of the buffer at each Master or Slave.

8

Sim_Time

Must match simulation duration at the top-level.

3.0E-06
Mode_Arbiter
 First Come First Serve  arbitration that supports priority .
Round robin  and custom modes also present
Enable_Plots
 Enabling this check box displays throughput and latency.




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