Architectural queueing is an important topic in the sense that queues are needed at the system-level. Queueing theory has been a mathematical concept since the late 1800’s; actually Agner Erlang from Copenhagen, Denmark; https://en.wikipedia.org/wiki/Erlang_distribution; who worked in the telephone industry; developed the first queues!  Architectural queueing handles port operations; whether a hardware accelerator, interconnect port, or an algorithm that cannot move forward unless the prior transaction completes!  At Mirabilis Design Inc. queueing permeates our approach to architecture to the extent that we support queues in single Java or larger library blocks!  Queues effect timing and power; as binary entities; called DSs in VisualSim (VS), are stored in a queue; and move to the next stage of processing after completing the current processing algorithm step!   This effects latency and power, both of which VS supports!  The placement of queues in a library, or system, is important for parallel processing!  Network on Chip (NoC) is a parallel node structure that requires queues, for example.  Queues require special macros, or special hardware at the chip level to operate efficiently.; FPGAs comes to mind.

Queueing theory characterizes the arrival rate, or input processing; departure rate, or output processing as fixed type of distributions; whereas both might be non-linear distributions!