VisualSim AMD-Xilinx Versal FPGA

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VisualSim AMD-Xilinx Versal FPGA Modeling

The VisualSim AMD-Xilinx Versal FPGA Trade-Off App Platform brings the full power of system modeling to enable system architects to navigate the complex network of fabrics and heterogeneous resources.  Using this platform, systems engineers and algorithm specialists can quickly map the signal processing algorithms onto different resources and design the Fabric. This process is conducted prior to the Xilinx Data Entry tools and enables Power-Performance Area Trade-off. VisualSim Versal is a system-level modeling platform with a complete library of Versal FPGA devices and a large number of signal processing components.  The solution aids algorithm and system architects to understand the impact of implementation decision prior to any development. 

 

AMD-Xilinx Versal FPGA is a complex SoC-FPGA that enables the partitioning of the algorithm across ARM Cortex A72 multicore processors, secure ARM R5 processors, Programmable Logic and a network AI Engine Tiles.

Here are some key points about this toolkit:

 

1. SoC-FPGA Models: A large library that covers all the Versal family of devices. The models cover the Network-on-chip (NoC) interfaces, processors, logic and AI Engines.

 

2. Signal Processing Algorithms: Library and table of signal processing components including FFT, FIR, trigonometric functions and other math operators. For each component, there are resource consumption and latency information on the different heterogeneous resources.

 

3. Mapping Methodology: A unique graphical mapping of the signal processing functions to the resources and the fabric that combines and compute, memory access and function transition across resources.

 

4. Workload Generators: This is generator of traffic for the interfaces, interrupts generation and triggering the algorithms.

 

5. Graphical Prototyping Environment: VisualSim is a graphical modeling environment that enables designers to assemble models by drag-n-drop components from the Library

 

6. Statistics, Testing and Debug Generator: Reports of the latency, throughout, buffer usage, link utilization, power consumption and resource usage are automatically generated, along with test benches for verification, XML files for populating downstream tables and debugging data using states.

 

7. Regression Simulation: Ability to distribute simulation across all the available cores on the system and specify configuration parameter, mapping, use cases and workload variations.

 

8. Requirements Management: Continuous tracking using an AI Engine on validity of the requirements while the system is simulated to identify system bottlenecks or inefficient mapping. 

 

9. Full System Modeling: In addition to FPGA models, the toolkit allows users to incorporate other pre-defined modeling IP blocks. This enables the construction of models for complete systems, such as routers, security appliances, industrial and automotive platforms, and multimedia devices.

 

10. Architecture Exploration: VisualSim Architect, a part of this toolkit, facilitates the selection of the right architecture by enabling rapid and extensive performance trade-offs during the product definition phase.

 

11. Transaction-Level Models: Unlike traditional approaches like Verilog/VHDL or schematics that require detailed knowledge of the FPGA device, VisualSim models operate at a transaction-level. They can be customized by users with minimal effort, which speeds up the modeling process. All SoC-FPGA models are pre-configured and does not require the designer to have any knowledge of the FPGA internals.

 

12. Xilinx Partnership: This toolkit has been developed in partnership with Xilinx and is intended for developers of high-performance, high-availability products that use Xilinx FPGA products.

 

13. Supported Platforms: The toolkit is designed for the AMD Versal FPGA families and supports a range of components, including processors/cores, buses and controllers, memory, communication devices, and more.

 

14. Design Validation: It is used early in the design cycle to validate architecture assumptions, determine performance and power consumption, identify bottlenecks, generate product specifications, and verification test suites.

 

15. Design Exploration: The toolkit allows designers to explore various architecture trade-offs at the system, hardware, and software levels. This includes optimizing the distribution of applications, control, and protocols, selecting the right FPGA device, partitioning applications or protocols between components, sizing resources, and more.

 

16. Software and Hardware Integration: It supports modeling both hardware and software aspects of the FPGA architecture, which is crucial for comprehensive system design.

 

17. Cost and Performance Trade-offs: Designers can use this environment to trade-off factors like cost, performance, availability, power consumption, and functionality to make informed design decisions

 

In summary, the VisualSim AMD-Xilinx FPGA App Exploration System is a valuable tool for FPGA designers and MatLab algorithm developers, that offers a graphical environment for creating and optimizing FPGA models, enabling early validation, and helping in the selection of the right architecture for high-performance applications. It simplifies the mapping process and supports various architecture trade-offs.

 

Explore VisualSim here: https://www.mirabilisdesign.com/visualsim/