Design UCIe-based Multi-die SoC with VisualSim

Jul 26, 2024  |  Author : admin_mirabilis

Architecture-stage EDA Tool VisualSim to Design UCIe-based Multi-die SoC While performance is the key factor for commercial success of any semiconductor chip, the development cost and time plays an even more critical role in the successful launch of the chip. Extremely complex and expensive semiconductor fabrication technologies such as nano-sheet FETs are used today at […]

Read more


DAC 2024 with Mirabilis Design

Jun 11, 2024  |  Author : admin_mirabilis
Join Mirabilis Design at DAC 2024 in Booth 2342

DAC 2024 with Mirabilis Design The Design Automation Conference (DAC) 2024 is just around the corner, taking place from June 23-27 at Moscone West, San Francisco. This premier event brings together industry leaders, innovators, and professionals in semiconductor and electronic design automation. Mirabilis Design, a pioneer in semiconductor and system-level IP development, will be showcasing […]

Read more


Crack the Power Code

May 04, 2024  |  Author : admin_mirabilis

Cracking the Power Code: Innovative Approach to SoC Power Optimization All about Power distribution, Management, Storage and Consumption.   Would you like to estimate the full SoC power consumed by an application or use case? Would like to test the power management strategy prior to development? Would you like the system model to generate Systemverilog, […]

Read more


System level SOC Power Modeling

Dec 13, 2023  |  Author : admin_mirabilis

System level SOC Power Modeling with VisualSim- Part 2 In the part 1 of this system-level power modeling series we introduced VisualSim and laid the foundation for the exploration of  SoC power architecture.  VisualSim Architect is a system level simulation tool which provides a one stop solution for early system level analysis and design space […]

Read more


System level SoC Power Modeling

Oct 26, 2023  |  Author : admin_mirabilis

System Level SOC Power Modeling with VisualSim In the intricate realm of System-on-Chip (SoC) design, optimizing power is paramount. This article series begins by introducing VisualSim, a versatile simulation tool, as a powerful contender in the domain of SoC power modeling and optimization. VisualSim enables system-level SoC power modeling even before delving into the intricacies […]

Read more