Stochastic Modeling

Distribution-based traffic
Demonstrates the use of the Traffic block to generate transactions based on multiple districtions
Ethernet Traffic
Generating Ethernet traffic based on traffic profile
Image Traffic
Generate images in the form of a Matrix for processing
SysML
Mapping SysML to a performance analysis model for Model-based System Simulation
Queue
Use of the Queue block to model the buffer management, ingress/egress queues, FIFO and SRAM in FPGAs
Server
Use of the Server block to model time-consumption by system resources. Resources can include hardware, RTOS, middleware, networks and interrupts
SystemResource
Mapping an MPEG use case to SystemResources for performance and power analysis
Quantity-Shared
Modeling consumption of quantity which can be memory addresses, semaphore pool and slots avaialable in a parking garage
Channel
Use of the Channel block to model communication, wireless and interface channels
Using Spreadsheet

Smart_Resource_model01

Browsable image of the model.

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(a) Defines a Queue, buffer or a FIFO. (b) Removes the head transaction when value is received at Pop. (c) Used when the processing delay is not known in advance. Input/Output: (a) Input: Transactions (b) Pop_Input: Integer (Queue Number) or array {Queue, position} (c) Output: Transactions, (d) reject_output: Transactions.