DMA is connected to Slave devices and I/O across the PCIe bus
Hardware Devices
Communication Channel Define a serial channel, parallel channel, FPGA-to-FPGA link, Aurora communication channel, and wireless channel with BER.
PCIe-to-AHB Bridge Bridge connects the Processor on an AHB bus to the DRAM on a PCIe Bus
AHB-to-AXI Bridge Shows a network containing a AHB connected to an AXI bus via bridge
DMA DMA is connected to Slave devices and I/O across the PCIe bus
Switch/Crossbar/Serial Switch Model shows the use of the Switch in managing connections between a large number of Masters and Slaves
UART Demonstrates the use of the UART and USART blocks in VisualSim
From_Network_DMA
Browsable image of the model.
For an executable version,
Mouse over the icons to view parameters. Click on hierarchy and plotters to reveal content (if provided).
To simulate, click on Launch button, open downloaded file and click Run on the Java Security Page.
In this model, the Source on the Right is sending the request to the DMA
via the Linear Port that is connected to the DMA left side after coming out
of another port.
The rest remain the same as the DMA-Direct Command Example.