SPARC and LEON

Executes a trace of the Dhrystone code

Processor Family

  • RISC-V SIMD
    RISC_V model execution the NP Benchmark tasks
  • RISC-V MIMD
    Coming Soon
  • PowerPC
    Network processor using a PowerPC. The backplane is a PCIe bus. The Processor, DMA and Switched Ethernet connected to the AXI Bus.
  • Coldfire
    Application of Coldfire in a Electronic Control Unit for a automotive application
  • RAD750
    Implements the ARINC653 Time-Space RTOS running a set of tasks on the basic RAD750 with PCI, 1553B and SpaceWire interfaces.
  • Renesas SH4
    ECU containing a SH4 running safety applications
  • Nvidia
    Drive-PX modeled with a CAN Network that is sending 4 Radar signals and 2 camera signals. The Drive-PX is modeled with the 4 ARM A72, 2 Denver and the GPU
  • SPARC and LEON
    Drive-PX modeled with a CAN Network that is sending 4 Radar signals and 2 camera signals. The Drive-PX is modeled with the 4 ARM A72, 2 Denver and the GPU
  • Intel ATOM
    Modeling a IoT application using an ATOm processor
  • AMD Opteron
    Compares the memory architecture of the Opteron Direct Connect with Xeon Shared Bus
  • TI OMAP
    Uses the OMAP4460 for a camera application

SoC_Comm_Arch

Browsable image of the model.

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SoC_Comm_Archmodel <h2>PowerTable2</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>This is the Excel spreadsheet import. The power \\ninformation is maintained here.</td><td>This is the Excel spreadsheet import. The power \\ninformation is maintained here.</td></tr><tr><td>Manager_Name</td><td>&quot;Manager_1&quot;</td><td>&quot;Manager_1&quot;</td></tr><tr><td>fileOrURL</td><td>&nbsp;</td><td>&quot;&quot;</td></tr><tr><td>Manager_Setup</td><td>/* Power_Table. First row contains Column Names, expressions valid for entries except Device Name. \\n \\n--------Device Name------- ---------Power States------ -----Operating States------ -----------State Transitions--------- --Speed-- --Exist-- */\\n Architecture_Block Standby Active Wait \tIdle \t\tExisting OffState OnState t_OnOff Mhz Volts ; \\nArchitecture_1_Sparc_Proc 30.0 180.0 20.0 \t0.0 Standby Standby Active 2.0e-9 500.0 1.0 ;\\nArchitecture_1_SRAM 10.0 50.0 5.0 0.0 Standby Standby Active 2.0e-9 500.0 1.0 ;\\nArchitecture_1_SDRAM 30.0 50.0 10.0 0.0 Standby Standby Active 2.0e-9 500.0 1.0 ;\\nArchitecture_1_PROM 30.0 50.0 10.0 0.0 Standby Standby Active 2.0e-9 500.0 1.0 ;</td><td>/* Power_Table. First row contains Column Names, expressions valid for entries except Device Name. \\n \\n--------Device Name------- ---------Power States------ -----Operating States------ -----------State Transitions--------- --Speed-- --Exist-- */\\n Architecture_Block Standby Active Wait \tIdle \t\tExisting OffState OnState t_OnOff Mhz Volts ; \\nArchitecture_1_Sparc_Proc 30.0 180.0 20.0 \t0.0 Standby Standby Active 2.0e-9 500.0 1.0 ;\\nArchitecture_1_SRAM 10.0 50.0 5.0 0.0 Standby Standby Active 2.0e-9 500.0 1.0 ;\\nArchitecture_1_SDRAM 30.0 50.0 10.0 0.0 Standby Standby Active 2.0e-9 500.0 1.0 ;\\nArchitecture_1_PROM 30.0 50.0 10.0 0.0 Standby Standby Active 2.0e-9 500.0 1.0 ;</td></tr><tr><td>Async_State_Change</td><td>/* Async_State_Change. First row contains Column Names, expressions valid for entries except Device Name. \\n \\n--------Device Name------- ------------Time State--------- */\\n Architecture_Block State Time_or_Express Next ; \\n</td><td>/* Async_State_Change. First row contains Column Names, expressions valid for entries except Device Name. \\n \\n--------Device Name------- ------------Time State--------- */\\n Architecture_Block State Time_or_Express Next ; \\n</td></tr><tr><td>Expression_List</td><td>/* First row contains Column Names. \\n \\n---------Reference-------- ------------------------------------Expression----------------------------------------------------------------------- */\\n Name Value ; \\n</td><td>/* First row contains Column Names. \\n \\n---------Reference-------- ------------------------------------Expression----------------------------------------------------------------------- */\\n Name Value ; \\n</td></tr><tr><td>Battery_Units</td><td>Watts</td><td>Watts</td></tr><tr><td>State_Plot_Enable</td><td>false</td><td>false</td></tr></table> <h2>ExpressionList4</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>Expression_List</td><td>/* No Expressions. */</td><td>/* No Expressions. */</td></tr><tr><td>Output_Ports</td><td>output</td><td>&quot;output&quot;</td></tr><tr><td>Output_Values</td><td>input.MIPS_IN_PROCESSOR</td><td>&quot;input.MIPS_IN_PROCESSOR&quot;</td></tr><tr><td>Output_Conditions</td><td>true</td><td>&quot;true&quot;</td></tr><tr><td>_flipPortsVertical</td><td>true</td><td>true</td></tr><tr><td>_flipPortsHorizontal</td><td>false</td><td>false</td></tr><tr><td>_rotatePorts</td><td>180</td><td>180</td></tr></table> <h2>TextDisplay</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>rowsDisplayed</td><td>10</td><td>10</td></tr><tr><td>columnsDisplayed</td><td>40</td><td>40</td></tr><tr><td>suppressBlankLines</td><td>false</td><td>false</td></tr><tr><td>title</td><td>IntructionOut</td><td>IntructionOut</td></tr><tr><td>ViewText</td><td>true</td><td>true</td></tr><tr><td>saveText</td><td>false</td><td>false</td></tr><tr><td>fileName</td><td>Enter Filename to save text</td><td>&quot;Enter Filename to save text&quot;</td></tr><tr><td>Append_Time</td><td>true</td><td>true</td></tr></table> <h2>ExpressionList</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>Expression_List</td><td>input.A_Destination = &quot;Sparc_Proc&quot;\\ninput.A_Hop = input.A_Destination\\ninput.A_Task_Flag = false\\ninput.A_Priority = 100\\ninput.A_Source = &quot;test1&quot;\\n</td><td>input.A_Destination = &quot;Sparc_Proc&quot;\\ninput.A_Hop = input.A_Destination\\ninput.A_Task_Flag = false\\ninput.A_Priority = 100\\ninput.A_Source = &quot;test1&quot;\\n</td></tr><tr><td>Output_Ports</td><td>output</td><td>&quot;output&quot;</td></tr><tr><td>Output_Values</td><td>input</td><td>&quot;input&quot;</td></tr><tr><td>Output_Conditions</td><td>true</td><td>&quot;true&quot;</td></tr></table> <h2>Stats</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>rowsDisplayed</td><td>10</td><td>10</td></tr><tr><td>columnsDisplayed</td><td>40</td><td>40</td></tr><tr><td>suppressBlankLines</td><td>false</td><td>false</td></tr><tr><td>title</td><td>&nbsp;</td><td>&nbsp;</td></tr><tr><td>ViewText</td><td>true</td><td>true</td></tr><tr><td>saveText</td><td>false</td><td>false</td></tr><tr><td>fileName</td><td>Enter Filename to save text</td><td>&quot;Enter Filename to save text&quot;</td></tr><tr><td>Append_Time</td><td>true</td><td>true</td></tr></table> <h2>AMBA_APB2</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Architecture_Name</td><td>&quot;Architecture_1&quot;</td><td>&quot;Architecture_1&quot;</td></tr><tr><td>Bus_Name</td><td>&quot;APB&quot;</td><td>&quot;APB&quot;</td></tr><tr><td>Bus_Speed_Mhz</td><td>APB_Speed</td><td>150.0</td></tr><tr><td>Burst_Size_Bytes</td><td>64</td><td>64</td></tr><tr><td>Sim_Time</td><td>SimTime</td><td>0.0025</td></tr><tr><td>_explanation</td><td>Hardware_Modeling-&gt;Standard_Bus-&gt;AMBA_APB_Bus</td><td>Hardware_Modeling-&gt;Standard_Bus-&gt;AMBA_APB_Bus</td></tr><tr><td>FIFO_Buffers</td><td>8</td><td>8</td></tr></table> <h2>Power Reports</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>fillOnWrapup</td><td>true</td><td>true</td></tr><tr><td>legend</td><td>Instantaneous, Average</td><td>Instantaneous, Average</td></tr><tr><td>startingDataset</td><td>0</td><td>0</td></tr><tr><td>fileName</td><td>Enter Filename to save plot</td><td>&quot;Enter Filename to save plot&quot;</td></tr><tr><td>viewPlot</td><td>true</td><td>true</td></tr><tr><td>savePlot</td><td>false</td><td>false</td></tr></table> <h2>DigitalIO</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr></table> <h2>ADC</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr></table> <h2>A1</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr></table> <h2>AnalogIO</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr></table> <h2>PWM</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr></table> <h2>ExpressionList3</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>Expression_List</td><td>/* Template to enter multiple RegEx lines*/\\n Result_A = TNow - input.TIME\\n </td><td>/* Template to enter multiple RegEx lines*/\\n Result_A = TNow - input.TIME\\n </td></tr><tr><td>Output_Ports</td><td>output,output2,output3,output4,output5,output6</td><td>&quot;output,output2,output3,output4,output5,output6&quot;</td></tr><tr><td>Output_Values</td><td>Result_A,Result_A,Result_A,Result_A,Result_A,Result_A</td><td>&quot;Result_A,Result_A,Result_A,Result_A,Result_A,Result_A&quot;</td></tr><tr><td>Output_Conditions</td><td>(input.A_Task_Source==&quot;A2&quot;),(input.A_Task_Source==&quot;AnalogIO&quot;),(input.A_Task_Source==&quot;PWM&quot;),(input.A_Task_Source==&quot;A1&quot;),(input.A_Task_Source==&quot;ADC&quot;),(input.A_Task_Source==&quot;DigitalIO&quot;)</td><td>&quot;(input.A_Task_Source==&quot;A2&quot;),(input.A_Task_Source==&quot;AnalogIO&quot;),(input.A_Task_Source==&quot;PWM&quot;),(input.A_Task_Source==&quot;A1&quot;),(input.A_Task_Source==&quot;ADC&quot;),(input.A_Task_Source==&quot;DigitalIO&quot;)&quot;</td></tr><tr><td>_flipPortsHorizontal</td><td>true</td><td>true</td></tr></table> <h2>Latency</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>fillOnWrapup</td><td>true</td><td>true</td></tr><tr><td>legend</td><td>A2, AnalogIO, PWM, A1, ADC, DigitalIO</td><td>A2, AnalogIO, PWM, A1, ADC, DigitalIO</td></tr><tr><td>startingDataset</td><td>0</td><td>0</td></tr><tr><td>fileName</td><td>Enter Filename to save plot</td><td>&quot;Enter Filename to save plot&quot;</td></tr><tr><td>viewPlot</td><td>true</td><td>true</td></tr><tr><td>savePlot</td><td>false</td><td>false</td></tr><tr><td>_flipPortsHorizontal</td><td>true</td><td>true</td></tr></table> <h2>ExpressionList2</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>Expression_List</td><td>Result_A = (input.A_Destination != &quot;Architecture_1&quot;)?true:false\\n</td><td>Result_A = (input.A_Destination != &quot;Architecture_1&quot;)?true:false\\n</td></tr><tr><td>Output_Ports</td><td>output</td><td>&quot;output&quot;</td></tr><tr><td>Output_Values</td><td>input</td><td>&quot;input&quot;</td></tr><tr><td>Output_Conditions</td><td>Result_A</td><td>&quot;Result_A&quot;</td></tr><tr><td>_flipPortsHorizontal</td><td>true</td><td>true</td></tr></table> <h2>MIPS</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>fillOnWrapup</td><td>true</td><td>true</td></tr><tr><td>legend</td><td>&nbsp;</td><td>&nbsp;</td></tr><tr><td>startingDataset</td><td>0</td><td>0</td></tr><tr><td>fileName</td><td>Enter Filename to save plot</td><td>&quot;Enter Filename to save plot&quot;</td></tr><tr><td>viewPlot</td><td>true</td><td>true</td></tr><tr><td>savePlot</td><td>false</td><td>false</td></tr><tr><td>_flipPortsHorizontal</td><td>true</td><td>true</td></tr></table> <h2>IN2</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>Destination_Name</td><td>to_Proc</td><td>&quot;to_Proc&quot;</td></tr><tr><td>Destination_Type</td><td>Global</td><td>Global</td></tr></table> <h2>Mem_Controller</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr></table> <h2>TaskGenerator</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Name</td><td>&quot;My_SoftGen&quot;</td><td>&quot;My_SoftGen&quot;</td></tr><tr><td>Mode_of_Operation</td><td>&quot;Field&quot; /* Field gets input, Random selects a Task, Loop is sequential */</td><td>&quot;Field&quot;</td></tr><tr><td>DEBUG</td><td>false /* To Command Line */</td><td>false</td></tr><tr><td>_explanation</td><td>ProcessorGenerator-&gt;TaskGenerator</td><td>ProcessorGenerator-&gt;TaskGenerator</td></tr><tr><td>Sim_Time</td><td>SimTime</td><td>0.0025</td></tr><tr><td>Instruction_Mix_File</td><td>Instruction_Mix_Table.txt</td><td>&quot;Instruction_Mix_Table.txt&quot;</td></tr></table> <h2>PROM</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>Architecture_Name</td><td>&quot;Architecture_1&quot;</td><td>&quot;Architecture_1&quot;</td></tr><tr><td>Memory_Name</td><td>&quot;PROM&quot;</td><td>&quot;PROM&quot;</td></tr><tr><td>Memory_Speed_Mhz</td><td>250.0</td><td>250.0</td></tr><tr><td>Memory_Size_MBytes</td><td>64.0</td><td>64.0</td></tr><tr><td>Access_Time</td><td>&quot;Read 5.0, Prefetch 6.0, Write 7.0, ReadWrite 8.0, Erase 9.0&quot;</td><td>&quot;Read 5.0, Prefetch 6.0, Write 7.0, ReadWrite 8.0, Erase 9.0&quot;</td></tr><tr><td>FIFO_Buffers</td><td>32</td><td>32</td></tr><tr><td>Refresh_Rate_Cycles</td><td>250</td><td>250</td></tr><tr><td>Refresh_Cycles</td><td>32</td><td>32</td></tr><tr><td>Memory_Address</td><td>&quot;/* Format: Min_Address,Max_Address. Example:201,300 */&quot;</td><td>&quot;/* Format: Min_Address,Max_Address. Example:201,300 */&quot;</td></tr><tr><td>Controller_Time</td><td>&quot;Cycle_Time * 1.0&quot;</td><td>&quot;Cycle_Time * 1.0&quot;</td></tr><tr><td>Enable_Hello_Messages</td><td>true</td><td>true</td></tr><tr><td>Width_Bytes</td><td>4</td><td>4</td></tr><tr><td>Memory_Type</td><td>SDR</td><td>SDR</td></tr><tr><td>Refresh</td><td>false</td><td>false</td></tr></table> <h2>SDRAM</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>Architecture_Name</td><td>&quot;Architecture_1&quot;</td><td>&quot;Architecture_1&quot;</td></tr><tr><td>Memory_Name</td><td>&quot;SDRAM&quot;</td><td>&quot;SDRAM&quot;</td></tr><tr><td>Memory_Speed_Mhz</td><td>SDRAM_Speed</td><td>167.0</td></tr><tr><td>Memory_Size_MBytes</td><td>128.0</td><td>128.0</td></tr><tr><td>Access_Time</td><td>&quot;Read 5.0, Prefetch 6.0, Write 7.0, ReadWrite 8.0, Erase 9.0&quot;</td><td>&quot;Read 5.0, Prefetch 6.0, Write 7.0, ReadWrite 8.0, Erase 9.0&quot;</td></tr><tr><td>FIFO_Buffers</td><td>128</td><td>128</td></tr><tr><td>Refresh_Rate_Cycles</td><td>16384</td><td>16384</td></tr><tr><td>Refresh_Cycles</td><td>32</td><td>32</td></tr><tr><td>Memory_Address</td><td>&quot;/* Format: Min_Address,Max_Address. Example:201,300 */&quot;</td><td>&quot;/* Format: Min_Address,Max_Address. Example:201,300 */&quot;</td></tr><tr><td>Controller_Time</td><td>&quot;Cycle_Time * 1.0&quot;</td><td>&quot;Cycle_Time * 1.0&quot;</td></tr><tr><td>Enable_Hello_Messages</td><td>true</td><td>true</td></tr><tr><td>Width_Bytes</td><td>4</td><td>4</td></tr><tr><td>Memory_Type</td><td>DDR2</td><td>DDR2</td></tr></table> <h2>SRAM</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>Architecture_Name</td><td>&quot;Architecture_1&quot;</td><td>&quot;Architecture_1&quot;</td></tr><tr><td>Memory_Name</td><td>&quot;SRAM&quot;</td><td>&quot;SRAM&quot;</td></tr><tr><td>Memory_Speed_Mhz</td><td>SRAM_Speed</td><td>300.0</td></tr><tr><td>Memory_Size_MBytes</td><td>64.0</td><td>64.0</td></tr><tr><td>Access_Time</td><td>&quot;Read 5.0, Prefetch 6.0, Write 7.0, ReadWrite 8.0, Erase 9.0&quot;</td><td>&quot;Read 5.0, Prefetch 6.0, Write 7.0, ReadWrite 8.0, Erase 9.0&quot;</td></tr><tr><td>FIFO_Buffers</td><td>32</td><td>32</td></tr><tr><td>Refresh_Rate_Cycles</td><td>850</td><td>850</td></tr><tr><td>Refresh_Cycles</td><td>32</td><td>32</td></tr><tr><td>Memory_Address</td><td>&quot;/* Format: Min_Address,Max_Address. Example:201,300 */&quot;</td><td>&quot;/* Format: Min_Address,Max_Address. Example:201,300 */&quot;</td></tr><tr><td>Controller_Time</td><td>&quot;Cycle_Time * 1.0&quot;</td><td>&quot;Cycle_Time * 1.0&quot;</td></tr><tr><td>Enable_Hello_Messages</td><td>true</td><td>true</td></tr><tr><td>Width_Bytes</td><td>4</td><td>4</td></tr><tr><td>Memory_Type</td><td>SDR</td><td>SDR</td></tr><tr><td>Refresh</td><td>false</td><td>false</td></tr></table> <h2>AMBA_AHB</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Architecture_Name</td><td>&quot;Architecture_1&quot;</td><td>&quot;Architecture_1&quot;</td></tr><tr><td>Bus_Name</td><td>&quot;AHB&quot;</td><td>&quot;AHB&quot;</td></tr><tr><td>Bus_Speed_Mhz</td><td>AHB_Speed</td><td>150.0</td></tr><tr><td>_explanation</td><td>Interfaces and Buses-&gt;AMBA-&gt;AMBA_AHB_Bus</td><td>Interfaces and Buses-&gt;AMBA-&gt;AMBA_AHB_Bus</td></tr><tr><td>Burst_Size_Bytes</td><td>64</td><td>64</td></tr><tr><td>Sim_Time</td><td>SimTime</td><td>0.0025</td></tr><tr><td>FIFO_Buffers</td><td>8</td><td>8</td></tr><tr><td>Round_Robin_Port_Array</td><td>{Bus_Name+&quot;_Port_1&quot;, Bus_Name+&quot;_Port_2&quot;, Bus_Name+&quot;_Port_3&quot;, Bus_Name+&quot;_Port_4&quot;, Bus_Name+&quot;_Port_5&quot;, Bus_Name+&quot;_Port_6&quot;, Bus_Name+&quot;_Port_7&quot;, Bus_Name+&quot;_Port_8&quot;}</td><td>{&quot;AHB_Port_1&quot;, &quot;AHB_Port_2&quot;, &quot;AHB_Port_3&quot;, &quot;AHB_Port_4&quot;, &quot;AHB_Port_5&quot;, &quot;AHB_Port_6&quot;, &quot;AHB_Port_7&quot;, &quot;AHB_Port_8&quot;}</td></tr><tr><td>Devices_Attached_to_Slave_by_Port</td><td>{{&quot;Device_1&quot;},{&quot;Device_2&quot;},{&quot;Device_3&quot;},{&quot;Device_4&quot;},{&quot;Device_5&quot;},{&quot;Device_6&quot;},{&quot;Device_7&quot;},{&quot;Device_8&quot;}}</td><td>{{&quot;Device_1&quot;}, {&quot;Device_2&quot;}, {&quot;Device_3&quot;}, {&quot;Device_4&quot;}, {&quot;Device_5&quot;}, {&quot;Device_6&quot;}, {&quot;Device_7&quot;}, {&quot;Device_8&quot;}}</td></tr></table> <h2>Processor</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>Architecture_Name</td><td>&quot;Architecture_1&quot;</td><td>&quot;Architecture_1&quot;</td></tr><tr><td>Processor_Name</td><td>&quot;Sparc_Proc&quot;</td><td>&quot;Sparc_Proc&quot;</td></tr><tr><td>Processor_Setup</td><td>/* First row contains Column Names. */\\nParameter_Name Parameter_Value ; \\nProcessor_Instruction_Set: SPARCInstructionSet \\nProcessor_Registers: 32 /* per window, dependent thread */ \\nContext_Switch_Cycles: 10\\nProcessor_Speed_Mhz: Processor_Speed \\nInstruction_Queue_Length: 6 \\nPipeline_Stages: 4 \\nINT_Execution_Units: 1 \\nFP_Execution_Units: 1 \\nCache_Execution_Units 2 \\nI_1 {Cache_Speed_Mhz=150.0, Size_KBytes=16.0, Words_per_Cache_Line=8, Cache_Miss_Name=SRAM} \\nD_1 {Cache_Speed_Mhz=150.0, Size_KBytes=16.0, Words_per_Cache_Line=8, Cache_Miss_Name=SDRAM} \\n\\n</td><td>/* First row contains Column Names. */\\nParameter_Name Parameter_Value ; \\nProcessor_Instruction_Set: SPARCInstructionSet \\nProcessor_Registers: 32 /* per window, dependent thread */ \\nContext_Switch_Cycles: 10\\nProcessor_Speed_Mhz: Processor_Speed \\nInstruction_Queue_Length: 6 \\nPipeline_Stages: 4 \\nINT_Execution_Units: 1 \\nFP_Execution_Units: 1 \\nCache_Execution_Units 2 \\nI_1 {Cache_Speed_Mhz=150.0, Size_KBytes=16.0, Words_per_Cache_Line=8, Cache_Miss_Name=SRAM} \\nD_1 {Cache_Speed_Mhz=150.0, Size_KBytes=16.0, Words_per_Cache_Line=8, Cache_Miss_Name=SDRAM} \\n\\n</td></tr><tr><td>Pipeline_Stages</td><td>/* First row contains Column Names. */\\nStage_Name Execute_Location Action Condition ; \\n1_PREFETCH I_1 instr none ; \\n1_PREFETCH D_1 read none ; \\n2_DECODE I_1 wait none ; \\n2_DECODE D_1 wait none ; \\n3_EXECUTE SPRC exec none ;\\n4_STORE SPRC wait none ;\\n4_STORE D_1 write none ; </td><td>/* First row contains Column Names. */\\nStage_Name Execute_Location Action Condition ; \\n1_PREFETCH I_1 instr none ; \\n1_PREFETCH D_1 read none ; \\n2_DECODE I_1 wait none ; \\n2_DECODE D_1 wait none ; \\n3_EXECUTE SPRC exec none ;\\n4_STORE SPRC wait none ;\\n4_STORE D_1 write none ; </td></tr><tr><td>Enable_Hello_Messages</td><td>true</td><td>true</td></tr><tr><td>Processor_Bits</td><td>32</td><td>32</td></tr></table> <h2>ArchitectureSetup</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>Architecture_Name</td><td>&quot;Architecture_1&quot;</td><td>&quot;Architecture_1&quot;</td></tr><tr><td>Field_Name_Mapping</td><td>/* First row contains Column Names. */\\nExternal_Field_Name Internal_Field_Name ; \\nA_Address A_Address ; \\nA_Bytes A_Bytes ; \\nA_Data A_Data ; \\nA_IDX A_IDX ; \\nA_Instruction A_Instruction ; \\nA_Priority A_Priority ; \\nA_Source A_Source ; \\nA_Destination A_Destination ; \\nA_Task_ID A_Task_ID ; \\nA_Time A_Time ; \\n</td><td>/* First row contains Column Names. */\\nExternal_Field_Name Internal_Field_Name ; \\nA_Address A_Address ; \\nA_Bytes A_Bytes ; \\nA_Data A_Data ; \\nA_IDX A_IDX ; \\nA_Instruction A_Instruction ; \\nA_Priority A_Priority ; \\nA_Source A_Source ; \\nA_Destination A_Destination ; \\nA_Task_ID A_Task_ID ; \\nA_Time A_Time ; \\n</td></tr><tr><td>Routing_Table</td><td>/* First row contains Column Names. */ \\n</td><td>/* First row contains Column Names. */ \\n</td></tr><tr><td>Number_of_Samples</td><td>1</td><td>1</td></tr><tr><td>Statistics_to_Plot</td><td>&quot;Sparc_Proc_PROC_Utilization_Min, Sparc_Proc_PROC_Utilization_Mean, Sparc_Proc_PROC_Utilization_Max&quot;</td><td>&quot;Sparc_Proc_PROC_Utilization_Min, Sparc_Proc_PROC_Utilization_Mean, Sparc_Proc_PROC_Utilization_Max&quot;</td></tr><tr><td>Internal_Plot_Trace_Offset</td><td>2</td><td>2</td></tr><tr><td>Listen_to_Architecture_Options</td><td>Processor</td><td>Processor</td></tr></table> <h2>Instruction_Set</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>Instruction_Set_Name</td><td>&quot;SPARCInstructionSet&quot;</td><td>&quot;SPARCInstructionSet&quot;</td></tr><tr><td>_explanation</td><td>ProcessorGenerator-&gt;Instruction_Set</td><td>ProcessorGenerator-&gt;Instruction_Set</td></tr><tr><td>Instruction_Set_Text</td><td>/* Instruction Set or File Path. */\\n Mnew Min Max ; /* Label */\\n SPRC INT_1 FP_1 ;\\n\\nbegin INT_1\t;\\n\tLDSB\t2\t;\\n\tLDSH\t2\t;\\n\tLDUB\t2\t;\\n\tLDUH\t2\t;\\n\tLD\t2\t;\\n\tLDD\t2\t;\\n\tLDF\t2\t;\\n\tLDDF\t2\t;\\n\tLDFSR\t2\t;\\n\tLDC\t2\t;\\n\tLDDC\t2\t;\\n\tLDCSR\t2\t;\\n\tSTB\t2\t;\\n\tSTH\t2\t;\\n\tST\t2\t;\\n\tSTD\t3\t;\\n\tSTF\t3\t;\\n\tSTDF\t4\t;\\n\tSTFSR\t4\t;\\n\tSTDFQ\t4\t;\\n\tSTC\t4\t;\\n\tSTDC\t4\t;\\n\tSTCSR\t3\t;\\n\tSTDCQ\t3\t;\\n\tLDSTUB\t3\t;\\n\tSWAP\t1\t;\\n\tSETHI\t1\t;\\n\tNOP\t1\t;\\n\tAND\t1\t;\\n\tANDN\t1\t;\\n\tOR\t1\t;\\n\tORN\t1\t;\\n\tXOR\t1\t;\\n\tXNOR\t1\t;\\n\tSLL\t1\t;\\n\tSRL\t1\t;\\n\tSRA\t1\t;\\n\tADD\t1\t;\\n\tADDX\t1\t;\\n\tTADDcc\t1\t;\\n\tSUB\t1\t;\\n\tSUBX\t1\t;\\n\tTSUBcc\t1\t;\\n\tMULScc\t1\t;\\n\tUMUL\t5\t;\\n\tSMUL\t5\t;\\n\tUDIV\t15\t;\\n\tSDIV\t15\t;\\n\tSAVE\t3\t;\\n\tRESTORE\t3\t;\\n\tRDASR\t1\t;\\n\tRDY\t1\t;\\n\tRDPSR\t1\t;\\n\tRDWIM\t1\t;\\n\tRDTBR\t1\t;\\n\tWRASR\t1\t;\\n\tWRY\t1\t;\\n\tWRPSR\t1\t;\\n\tWRTBR\t1\t;\\n\tSTBAR\t1\t;\\n\tUNIMP\t1\t;\\n\tFLUSH\t1\t;\\n\tBicc\t1\t;\\n\tFBfcc\t1\t;\\n\tCBccc\t1\t;\\n\tCALL\t1\t;\\n\tJMPL\t3\t;\\n\tRETT\t3\t;\\nend INT_1\t;\\n\\nbegin FP_1\t;\\n\tFiTO\t2\t;\\n\tFTOi\t2\t;\\n\tFsTOd\t2\t;\\n\tFsTOq\t2\t;\\n\tFdTOs\t10\t;\\n\tFdTOq\t10\t;\\n\tFqTOs\t10\t;\\n\tFqTOd\t10\t;\\n\tFMOVs\t2\t;\\n\tFNEGs\t2\t;\\n\tFABSs\t15\t;\\n\tFSQRT\t15\t;\\n\tFADD\t2\t;\\n\tFSUB\t2\t;\\n\tFMUL\t2\t;\\n\tFDIV\t16\t;\\n\tFsMULd\t2\t;\\n\tFCMP\t2\t;\\n\tFCMPE\t2\t;\\nend FP_1\t;</td><td>/* Instruction Set or File Path. */\\n Mnew Min Max ; /* Label */\\n SPRC INT_1 FP_1 ;\\n\\nbegin INT_1\t;\\n\tLDSB\t2\t;\\n\tLDSH\t2\t;\\n\tLDUB\t2\t;\\n\tLDUH\t2\t;\\n\tLD\t2\t;\\n\tLDD\t2\t;\\n\tLDF\t2\t;\\n\tLDDF\t2\t;\\n\tLDFSR\t2\t;\\n\tLDC\t2\t;\\n\tLDDC\t2\t;\\n\tLDCSR\t2\t;\\n\tSTB\t2\t;\\n\tSTH\t2\t;\\n\tST\t2\t;\\n\tSTD\t3\t;\\n\tSTF\t3\t;\\n\tSTDF\t4\t;\\n\tSTFSR\t4\t;\\n\tSTDFQ\t4\t;\\n\tSTC\t4\t;\\n\tSTDC\t4\t;\\n\tSTCSR\t3\t;\\n\tSTDCQ\t3\t;\\n\tLDSTUB\t3\t;\\n\tSWAP\t1\t;\\n\tSETHI\t1\t;\\n\tNOP\t1\t;\\n\tAND\t1\t;\\n\tANDN\t1\t;\\n\tOR\t1\t;\\n\tORN\t1\t;\\n\tXOR\t1\t;\\n\tXNOR\t1\t;\\n\tSLL\t1\t;\\n\tSRL\t1\t;\\n\tSRA\t1\t;\\n\tADD\t1\t;\\n\tADDX\t1\t;\\n\tTADDcc\t1\t;\\n\tSUB\t1\t;\\n\tSUBX\t1\t;\\n\tTSUBcc\t1\t;\\n\tMULScc\t1\t;\\n\tUMUL\t5\t;\\n\tSMUL\t5\t;\\n\tUDIV\t15\t;\\n\tSDIV\t15\t;\\n\tSAVE\t3\t;\\n\tRESTORE\t3\t;\\n\tRDASR\t1\t;\\n\tRDY\t1\t;\\n\tRDPSR\t1\t;\\n\tRDWIM\t1\t;\\n\tRDTBR\t1\t;\\n\tWRASR\t1\t;\\n\tWRY\t1\t;\\n\tWRPSR\t1\t;\\n\tWRTBR\t1\t;\\n\tSTBAR\t1\t;\\n\tUNIMP\t1\t;\\n\tFLUSH\t1\t;\\n\tBicc\t1\t;\\n\tFBfcc\t1\t;\\n\tCBccc\t1\t;\\n\tCALL\t1\t;\\n\tJMPL\t3\t;\\n\tRETT\t3\t;\\nend INT_1\t;\\n\\nbegin FP_1\t;\\n\tFiTO\t2\t;\\n\tFTOi\t2\t;\\n\tFsTOd\t2\t;\\n\tFsTOq\t2\t;\\n\tFdTOs\t10\t;\\n\tFdTOq\t10\t;\\n\tFqTOs\t10\t;\\n\tFqTOd\t10\t;\\n\tFMOVs\t2\t;\\n\tFNEGs\t2\t;\\n\tFABSs\t15\t;\\n\tFSQRT\t15\t;\\n\tFADD\t2\t;\\n\tFSUB\t2\t;\\n\tFMUL\t2\t;\\n\tFDIV\t16\t;\\n\tFsMULd\t2\t;\\n\tFCMP\t2\t;\\n\tFCMPE\t2\t;\\nend FP_1\t;</td></tr><tr><td>Record_Set_Name</td><td>&quot;Record_Set_Name&quot;</td><td>&quot;Record_Set_Name&quot;</td></tr></table> <h2>A2</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>_flipPortsVertical</td><td>false</td><td>false</td></tr><tr><td>_flipPortsHorizontal</td><td>false</td><td>false</td></tr><tr><td>_rotatePorts</td><td>90</td><td>90</td></tr></table> <h2>Bridge</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Architecture_Name</td><td>&quot;Architecture_1&quot;</td><td>&quot;Architecture_1&quot;</td></tr><tr><td>Bridge_Name</td><td>&quot;Bridge2&quot;</td><td>&quot;Bridge2&quot;</td></tr><tr><td>Bridge_Speed_in_Mhz</td><td>150.0</td><td>150.0</td></tr><tr><td>Bridge_Width_in_Bytes</td><td>4</td><td>4</td></tr><tr><td>Overhead_Cycles</td><td>1</td><td>1</td></tr><tr><td>_explanation</td><td>Hardware_Modeling-&gt;Bus_Switch_Ctrl-&gt;Bridge</td><td>Hardware_Modeling-&gt;Bus_Switch_Ctrl-&gt;Bridge</td></tr><tr><td>Sim_Time</td><td>SimTime</td><td>0.0025</td></tr></table>

Implements the Dhyrstone benchmark on a Sparc and Leon processor.