Cortex M3 Microcontroller

Using the standard M3 library product to construct a SoC controller for an IoT application

ARM Processor Family

  • Cortex M0 Microcontroller
    Coming Soon
  • Cortex M3 Microcontroller
    Using the standard M3 library product to construct a SoC controller for an IoT application
  • Cortex M4 Microcontrollers
    Using the standard M4 library product to construct a SoC controller for an IoT application
  • A7
    Dual ARM A7 executing AES code. Code was generated from the ARM Emulator
  • A8
    Single ARM A8 Cortex implements an AES code. Includes power analysis, throughput, pipeline utilization and task latency
  • A9
    Dual ARM Cortex A9 with a PCI interface sending traffic
  • A53
    Modeling tasks on the A53 including loading and storing using a DMA
  • A72
    Coming Soon
  • A76
    Coming Soon
  • R4
    Used for a encryption algorithm where the packet is decrypted and the data is filtered using a TI DSP C64x

ARM_CortexM3_Demo_V1

Browsable image of the model.

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    Windows- Compatibility:Windows 10 or higher (*)
    macOS - Compatibility:macOS 10.15 (Catalina) or higher (*)
    Linux - Compatibility:Ubuntu 18.04 LTS or higher (*)
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  • To simulate, click on Launch button, open downloaded file and click Run on the Java Security Page.
ARM_CortexM3_Demo_V1model <h2>Latency</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>fillOnWrapup</td><td>true</td><td>true</td></tr><tr><td>legend</td><td>&nbsp;</td><td>&nbsp;</td></tr><tr><td>startingDataset</td><td>0</td><td>0</td></tr><tr><td>fileName</td><td>Enter Filename to save plot</td><td>&quot;Enter Filename to save plot&quot;</td></tr><tr><td>viewPlot</td><td>true</td><td>true</td></tr><tr><td>savePlot</td><td>false</td><td>false</td></tr></table> <h2>RmvHelloMsg</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>Expression_List</td><td>/* No Expressions. */</td><td>/* No Expressions. */</td></tr><tr><td>Output_Ports</td><td>output</td><td>&quot;output&quot;</td></tr><tr><td>Output_Values</td><td>input</td><td>&quot;input&quot;</td></tr><tr><td>Output_Conditions</td><td>input.A_Destination != &quot;Architecture_1&quot;</td><td>&quot;input.A_Destination != &quot;Architecture_1&quot;&quot;</td></tr></table> <h2>ComputeLatency</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>Expression_List</td><td>/* Template to enter multiple RegEx lines*/\\n</td><td>/* Template to enter multiple RegEx lines*/\\n</td></tr><tr><td>Output_Ports</td><td>output</td><td>&quot;output&quot;</td></tr><tr><td>Output_Values</td><td>TNow - input.TIME</td><td>&quot;TNow - input.TIME&quot;</td></tr><tr><td>Output_Conditions</td><td>true</td><td>&quot;true&quot;</td></tr></table> <h2>TaskGenerator</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Name</td><td>&quot;My_SoftGen&quot;</td><td>&quot;My_SoftGen&quot;</td></tr><tr><td>Mode_of_Operation</td><td>&quot;Loop&quot; /* Field gets input, Random selects a Task, Loop is sequential */</td><td>&quot;Loop&quot;</td></tr><tr><td>DEBUG</td><td>false /* To Debug Port */</td><td>false</td></tr><tr><td>_explanation</td><td>ProcessorGenerator-&gt;TaskGenerator</td><td>ProcessorGenerator-&gt;TaskGenerator</td></tr><tr><td>Sim_Time</td><td>Sim_Time</td><td>0.1</td></tr><tr><td>Instruction_Mix_File</td><td>Instruction_Mix_Table.txt</td><td>&quot;Instruction_Mix_Table.txt&quot;</td></tr></table> <h2>ARM Cortex M3</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>Processor_Speed</td><td>40.0</td><td>40.0</td></tr><tr><td>Preemption_Enabled</td><td>true</td><td>true</td></tr><tr><td>Code_SRAM</td><td>&quot;SRAM_1&quot;</td><td>&quot;SRAM_1&quot;</td></tr><tr><td>Stack_SRAM</td><td>&quot;SRAM_2&quot;</td><td>&quot;SRAM_2&quot;</td></tr><tr><td>PowerValue_Watts</td><td>Architecture_Block Active Standby Wait Idle Cycles ; \\nArchitecture_1_ARM_CortexM3 CortexM3_Active CortexM3_Standby CortexM3_Standby 0.0 1 ;\\nArchitecture_1_SRAM_1 0.200 0.01 0.001 0.0001 1 ;\\nArchitecture_1_SRAM_2 0.200 0.01 0.001 0.0001 1 ;</td><td>&quot;Architecture_Block Active Standby Wait Idle Cycles ; \\nArchitecture_1_ARM_CortexM3 CortexM3_Active CortexM3_Standby CortexM3_Standby 0.0 1 ;\\nArchitecture_1_SRAM_1 0.200 0.01 0.001 0.0001 1 ;\\nArchitecture_1_SRAM_2 0.200 0.01 0.001 0.0001 1 ;&quot;</td></tr><tr><td>Enable_Power_Plot</td><td>true</td><td>true</td></tr><tr><td>Processor</td><td>&quot;ARM_CortexM3&quot;</td><td>&quot;ARM_CortexM3&quot;</td></tr></table> <h2>RAM2</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>Architecture_Name</td><td>&quot;Architecture_1&quot;</td><td>&quot;Architecture_1&quot;</td></tr><tr><td>Memory_Name</td><td>&quot;SRAM_2&quot;</td><td>&quot;SRAM_2&quot;</td></tr><tr><td>Memory_Speed_Mhz</td><td>Memory_Speed_MHz</td><td>40.0</td></tr><tr><td>Memory_Size_MBytes</td><td>0.032</td><td>0.032</td></tr><tr><td>Access_Time</td><td>&quot;Read 5.0, Prefetch 6.0, Write 7.0, ReadWrite 8.0, Erase 9.0&quot;</td><td>&quot;Read 5.0, Prefetch 6.0, Write 7.0, ReadWrite 8.0, Erase 9.0&quot;</td></tr><tr><td>FIFO_Buffers</td><td>32</td><td>32</td></tr><tr><td>Refresh_Rate_Cycles</td><td>16384</td><td>16384</td></tr><tr><td>Refresh_Cycles</td><td>32</td><td>32</td></tr><tr><td>Memory_Address</td><td>&quot;/* Format: Min_Address,Max_Address. Example:201,300 */&quot;</td><td>&quot;/* Format: Min_Address,Max_Address. Example:201,300 */&quot;</td></tr><tr><td>Controller_Time</td><td>&quot;Cycle_Time * 1.0&quot;</td><td>&quot;Cycle_Time * 1.0&quot;</td></tr><tr><td>Enable_Hello_Messages</td><td>true</td><td>true</td></tr><tr><td>Width_Bytes</td><td>4</td><td>4</td></tr><tr><td>Memory_Type</td><td>SDR</td><td>SDR</td></tr><tr><td>Refresh</td><td>false</td><td>false</td></tr></table> <h2>RAM</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>Architecture_Name</td><td>&quot;Architecture_1&quot;</td><td>&quot;Architecture_1&quot;</td></tr><tr><td>Memory_Name</td><td>&quot;SRAM_1&quot;</td><td>&quot;SRAM_1&quot;</td></tr><tr><td>Memory_Speed_Mhz</td><td>Memory_Speed_MHz</td><td>40.0</td></tr><tr><td>Memory_Size_MBytes</td><td>0.016</td><td>0.016</td></tr><tr><td>Access_Time</td><td>&quot;Read 5.0, Prefetch 6.0, Write 7.0, ReadWrite 8.0, Erase 9.0&quot;</td><td>&quot;Read 5.0, Prefetch 6.0, Write 7.0, ReadWrite 8.0, Erase 9.0&quot;</td></tr><tr><td>FIFO_Buffers</td><td>32</td><td>32</td></tr><tr><td>Refresh_Rate_Cycles</td><td>16384</td><td>16384</td></tr><tr><td>Refresh_Cycles</td><td>32</td><td>32</td></tr><tr><td>Memory_Address</td><td>&quot;/* Format: Min_Address,Max_Address. Example:201,300 */&quot;</td><td>&quot;/* Format: Min_Address,Max_Address. Example:201,300 */&quot;</td></tr><tr><td>Controller_Time</td><td>&quot;Cycle_Time * 1.0&quot;</td><td>&quot;Cycle_Time * 1.0&quot;</td></tr><tr><td>Enable_Hello_Messages</td><td>true</td><td>true</td></tr><tr><td>Width_Bytes</td><td>4</td><td>4</td></tr><tr><td>Memory_Type</td><td>SDR</td><td>SDR</td></tr><tr><td>Refresh</td><td>false</td><td>false</td></tr></table> <h2>SystemBus</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Architecture_Name</td><td>&quot;Architecture_1&quot;</td><td>&quot;Architecture_1&quot;</td></tr><tr><td>Bus_Name</td><td>&quot;AHB_Lite_Sys&quot;</td><td>&quot;AHB_Lite_Sys&quot;</td></tr><tr><td>Bus_Speed_Mhz</td><td>Bus_Speed_Mhz</td><td>40.0</td></tr><tr><td>_explanation</td><td>Interfaces and Buses-&gt;AMBA-&gt;AMBA_AHB_Bus</td><td>Interfaces and Buses-&gt;AMBA-&gt;AMBA_AHB_Bus</td></tr><tr><td>Burst_Size_Bytes</td><td>64</td><td>64</td></tr><tr><td>Sim_Time</td><td>Sim_Time</td><td>0.1</td></tr><tr><td>FIFO_Buffers</td><td>8</td><td>8</td></tr><tr><td>Round_Robin_Port_Array</td><td>{Bus_Name+&quot;_Port_1&quot;, Bus_Name+&quot;_Port_2&quot;, Bus_Name+&quot;_Port_3&quot;, Bus_Name+&quot;_Port_4&quot;, Bus_Name+&quot;_Port_5&quot;, Bus_Name+&quot;_Port_6&quot;, Bus_Name+&quot;_Port_7&quot;, Bus_Name+&quot;_Port_8&quot;}</td><td>{&quot;AHB_Lite_Sys_Port_1&quot;, &quot;AHB_Lite_Sys_Port_2&quot;, &quot;AHB_Lite_Sys_Port_3&quot;, &quot;AHB_Lite_Sys_Port_4&quot;, &quot;AHB_Lite_Sys_Port_5&quot;, &quot;AHB_Lite_Sys_Port_6&quot;, &quot;AHB_Lite_Sys_Port_7&quot;, &quot;AHB_Lite_Sys_Port_8&quot;}</td></tr><tr><td>Devices_Attached_to_Slave_by_Port</td><td>{{&quot;Device_1&quot;},{&quot;Device_2&quot;},{&quot;Device_3&quot;},{&quot;Device_4&quot;},{&quot;Device_5&quot;},{&quot;Device_6&quot;},{&quot;Device_7&quot;},{&quot;Device_8&quot;}}</td><td>{{&quot;Device_1&quot;}, {&quot;Device_2&quot;}, {&quot;Device_3&quot;}, {&quot;Device_4&quot;}, {&quot;Device_5&quot;}, {&quot;Device_6&quot;}, {&quot;Device_7&quot;}, {&quot;Device_8&quot;}}</td></tr></table> <h2>BusMatrix</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Architecture_Name</td><td>&quot;Architecture_1&quot;</td><td>&quot;Architecture_1&quot;</td></tr><tr><td>Switch_Name</td><td>&quot;Switch4&quot;</td><td>&quot;Switch4&quot;</td></tr><tr><td>Speed_Mhz</td><td>Bus_Speed_Mhz</td><td>40.0</td></tr><tr><td>Width_Bytes</td><td>4</td><td>4</td></tr><tr><td>Blocking_Mode</td><td>false</td><td>false</td></tr><tr><td>_explanation</td><td>Hardware_Modeling-&gt;Bus_Switch_Ctrl-&gt;Switch</td><td>Hardware_Modeling-&gt;Bus_Switch_Ctrl-&gt;Switch</td></tr><tr><td>Overhead_Cycles</td><td>1</td><td>1</td></tr><tr><td>Address_Bits</td><td>32</td><td>32</td></tr><tr><td>Sim_Time</td><td>Sim_Time</td><td>0.1</td></tr></table> <h2>AMBA_AHB</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Architecture_Name</td><td>&quot;Architecture_1&quot;</td><td>&quot;Architecture_1&quot;</td></tr><tr><td>Bus_Name</td><td>&quot;Processor_Bus&quot;</td><td>&quot;Processor_Bus&quot;</td></tr><tr><td>Bus_Speed_Mhz</td><td>Bus_Speed_Mhz</td><td>40.0</td></tr><tr><td>_explanation</td><td>Interfaces and Buses-&gt;AMBA-&gt;AMBA_AHB_Bus</td><td>Interfaces and Buses-&gt;AMBA-&gt;AMBA_AHB_Bus</td></tr><tr><td>Burst_Size_Bytes</td><td>64</td><td>64</td></tr><tr><td>Sim_Time</td><td>Sim_Time</td><td>0.1</td></tr><tr><td>FIFO_Buffers</td><td>8</td><td>8</td></tr><tr><td>Round_Robin_Port_Array</td><td>{Bus_Name+&quot;_Port_1&quot;, Bus_Name+&quot;_Port_2&quot;, Bus_Name+&quot;_Port_3&quot;, Bus_Name+&quot;_Port_4&quot;, Bus_Name+&quot;_Port_5&quot;, Bus_Name+&quot;_Port_6&quot;, Bus_Name+&quot;_Port_7&quot;, Bus_Name+&quot;_Port_8&quot;}</td><td>{&quot;Processor_Bus_Port_1&quot;, &quot;Processor_Bus_Port_2&quot;, &quot;Processor_Bus_Port_3&quot;, &quot;Processor_Bus_Port_4&quot;, &quot;Processor_Bus_Port_5&quot;, &quot;Processor_Bus_Port_6&quot;, &quot;Processor_Bus_Port_7&quot;, &quot;Processor_Bus_Port_8&quot;}</td></tr><tr><td>Devices_Attached_to_Slave_by_Port</td><td>{{&quot;Device_1&quot;},{&quot;Device_2&quot;},{&quot;Device_3&quot;},{&quot;Device_4&quot;},{&quot;Device_5&quot;},{&quot;Device_6&quot;},{&quot;Device_7&quot;},{&quot;Device_8&quot;}}</td><td>{{&quot;Device_1&quot;}, {&quot;Device_2&quot;}, {&quot;Device_3&quot;}, {&quot;Device_4&quot;}, {&quot;Device_5&quot;}, {&quot;Device_6&quot;}, {&quot;Device_7&quot;}, {&quot;Device_8&quot;}}</td></tr><tr><td>_hideName</td><td>true</td><td>true</td></tr></table> <h2>AHB_Lite_I_Bus</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Architecture_Name</td><td>&quot;Architecture_1&quot;</td><td>&quot;Architecture_1&quot;</td></tr><tr><td>Bus_Name</td><td>&quot;AHB_Lite_Instr&quot;</td><td>&quot;AHB_Lite_Instr&quot;</td></tr><tr><td>Bus_Speed_Mhz</td><td>Bus_Speed_Mhz</td><td>40.0</td></tr><tr><td>_explanation</td><td>Interfaces and Buses-&gt;AMBA-&gt;AMBA_AHB_Bus</td><td>Interfaces and Buses-&gt;AMBA-&gt;AMBA_AHB_Bus</td></tr><tr><td>Burst_Size_Bytes</td><td>8</td><td>8</td></tr><tr><td>Sim_Time</td><td>Sim_Time</td><td>0.1</td></tr><tr><td>FIFO_Buffers</td><td>8</td><td>8</td></tr><tr><td>Round_Robin_Port_Array</td><td>{Bus_Name+&quot;_Port_1&quot;, Bus_Name+&quot;_Port_2&quot;, Bus_Name+&quot;_Port_3&quot;, Bus_Name+&quot;_Port_4&quot;, Bus_Name+&quot;_Port_5&quot;, Bus_Name+&quot;_Port_6&quot;, Bus_Name+&quot;_Port_7&quot;, Bus_Name+&quot;_Port_8&quot;}</td><td>{&quot;AHB_Lite_Instr_Port_1&quot;, &quot;AHB_Lite_Instr_Port_2&quot;, &quot;AHB_Lite_Instr_Port_3&quot;, &quot;AHB_Lite_Instr_Port_4&quot;, &quot;AHB_Lite_Instr_Port_5&quot;, &quot;AHB_Lite_Instr_Port_6&quot;, &quot;AHB_Lite_Instr_Port_7&quot;, &quot;AHB_Lite_Instr_Port_8&quot;}</td></tr><tr><td>Devices_Attached_to_Slave_by_Port</td><td>{{&quot;Device_1&quot;},{&quot;Device_2&quot;},{&quot;Device_3&quot;},{&quot;Device_4&quot;},{&quot;Device_5&quot;},{&quot;Device_6&quot;},{&quot;Device_7&quot;},{&quot;Device_8&quot;}}</td><td>{{&quot;Device_1&quot;}, {&quot;Device_2&quot;}, {&quot;Device_3&quot;}, {&quot;Device_4&quot;}, {&quot;Device_5&quot;}, {&quot;Device_6&quot;}, {&quot;Device_7&quot;}, {&quot;Device_8&quot;}}</td></tr></table> <h2>Flash</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>Sequence_Read_Time</td><td>50.0e-9</td><td>5.0E-8</td></tr><tr><td>Random_Read_Time</td><td>50.0e-6</td><td>5.0E-5</td></tr><tr><td>Write_Access</td><td>50.0e-9</td><td>5.0E-8</td></tr><tr><td>Arch_Setup</td><td>&quot;Architecture_1&quot;</td><td>&quot;Architecture_1&quot;</td></tr><tr><td>Page_Size</td><td>2048</td><td>2048</td></tr><tr><td>Erase_Access</td><td>50.0e-9</td><td>5.0E-8</td></tr><tr><td>Read_Access_Time</td><td>50.0e-9</td><td>5.0E-8</td></tr><tr><td>Write_Access_Time</td><td>50.0e-9</td><td>5.0E-8</td></tr><tr><td>Erase_Access_Time</td><td>50.0e-9</td><td>5.0E-8</td></tr><tr><td>Flash_Name</td><td>&quot;Flash&quot;</td><td>&quot;Flash&quot;</td></tr><tr><td>Flash_CTRL_Name</td><td>&quot;Flash_Ctrl&quot;</td><td>&quot;Flash_Ctrl&quot;</td></tr><tr><td>Flash_Mem_Speed</td><td>Memory_Speed_MHz</td><td>40.0</td></tr><tr><td>Flash_Size_KB</td><td>512.0</td><td>512.0</td></tr><tr><td>Sim_Time</td><td>100.0e-3</td><td>0.1</td></tr></table> <h2>AMBA_APB</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Architecture_Name</td><td>&quot;Architecture_1&quot;</td><td>&quot;Architecture_1&quot;</td></tr><tr><td>Bus_Name</td><td>&quot;APB&quot;</td><td>&quot;APB&quot;</td></tr><tr><td>Bus_Speed_Mhz</td><td>Bus_Speed_Mhz</td><td>40.0</td></tr><tr><td>Burst_Size_Bytes</td><td>64</td><td>64</td></tr><tr><td>Sim_Time</td><td>Sim_Time</td><td>0.1</td></tr><tr><td>_explanation</td><td>Hardware_Modeling-&gt;Standard_Bus-&gt;AMBA_APB_Bus</td><td>Hardware_Modeling-&gt;Standard_Bus-&gt;AMBA_APB_Bus</td></tr><tr><td>FIFO_Buffers</td><td>8</td><td>8</td></tr></table> <h2>AHB_Lite_D_Bus</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Architecture_Name</td><td>&quot;Architecture_1&quot;</td><td>&quot;Architecture_1&quot;</td></tr><tr><td>Bus_Name</td><td>&quot;AHB_Lite_Data&quot;</td><td>&quot;AHB_Lite_Data&quot;</td></tr><tr><td>Bus_Speed_Mhz</td><td>Bus_Speed_Mhz</td><td>40.0</td></tr><tr><td>_explanation</td><td>Interfaces and Buses-&gt;AMBA-&gt;AMBA_AHB_Bus</td><td>Interfaces and Buses-&gt;AMBA-&gt;AMBA_AHB_Bus</td></tr><tr><td>Burst_Size_Bytes</td><td>8</td><td>8</td></tr><tr><td>Sim_Time</td><td>Sim_Time</td><td>0.1</td></tr><tr><td>FIFO_Buffers</td><td>8</td><td>8</td></tr><tr><td>Round_Robin_Port_Array</td><td>{Bus_Name+&quot;_Port_1&quot;, Bus_Name+&quot;_Port_2&quot;, Bus_Name+&quot;_Port_3&quot;, Bus_Name+&quot;_Port_4&quot;, Bus_Name+&quot;_Port_5&quot;, Bus_Name+&quot;_Port_6&quot;, Bus_Name+&quot;_Port_7&quot;, Bus_Name+&quot;_Port_8&quot;}</td><td>{&quot;AHB_Lite_Data_Port_1&quot;, &quot;AHB_Lite_Data_Port_2&quot;, &quot;AHB_Lite_Data_Port_3&quot;, &quot;AHB_Lite_Data_Port_4&quot;, &quot;AHB_Lite_Data_Port_5&quot;, &quot;AHB_Lite_Data_Port_6&quot;, &quot;AHB_Lite_Data_Port_7&quot;, &quot;AHB_Lite_Data_Port_8&quot;}</td></tr><tr><td>Devices_Attached_to_Slave_by_Port</td><td>{{&quot;Device_1&quot;},{&quot;Device_2&quot;},{&quot;Device_3&quot;},{&quot;Device_4&quot;},{&quot;Device_5&quot;},{&quot;Device_6&quot;},{&quot;Device_7&quot;},{&quot;Device_8&quot;}}</td><td>{{&quot;Device_1&quot;}, {&quot;Device_2&quot;}, {&quot;Device_3&quot;}, {&quot;Device_4&quot;}, {&quot;Device_5&quot;}, {&quot;Device_6&quot;}, {&quot;Device_7&quot;}, {&quot;Device_8&quot;}}</td></tr></table> <h2>ArchitectureSetup</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>Architecture_Name</td><td>&quot;Architecture_1&quot;</td><td>&quot;Architecture_1&quot;</td></tr><tr><td>Field_Name_Mapping</td><td>/* First row contains Column Names. */\\nExternal_Field_Name Internal_Field_Name ; \\nA_Address A_Address ; \\nA_Bytes A_Bytes ; \\nA_Data A_Data ; \\nA_IDX A_IDX ; \\nA_Instruction A_Instruction ; \\nA_Priority A_Priority ; \\nA_Source A_Source ; \\nA_Destination A_Destination ; \\nA_Task_ID A_Task_ID ; \\nA_Time A_Time ; \\n</td><td>/* First row contains Column Names. */\\nExternal_Field_Name Internal_Field_Name ; \\nA_Address A_Address ; \\nA_Bytes A_Bytes ; \\nA_Data A_Data ; \\nA_IDX A_IDX ; \\nA_Instruction A_Instruction ; \\nA_Priority A_Priority ; \\nA_Source A_Source ; \\nA_Destination A_Destination ; \\nA_Task_ID A_Task_ID ; \\nA_Time A_Time ; \\n</td></tr><tr><td>Routing_Table</td><td>/* First row contains Column Names. */\\nSource_Node Destination_Node Hop Source_Port ; \\nProcessor_1 Cache_1 Port_1 bus_out2 ;\\nCache_1 Processor_1 Port_2 output ;\\nCache_1 SDRAM_1 Port_2 output ;\\nSDRAM_1 Cache_1 Port_4 output ;\\nSDRAM_1 Processor_1 Port_4 output ;</td><td>/* First row contains Column Names. */\\nSource_Node Destination_Node Hop Source_Port ; \\nProcessor_1 Cache_1 Port_1 bus_out2 ;\\nCache_1 Processor_1 Port_2 output ;\\nCache_1 SDRAM_1 Port_2 output ;\\nSDRAM_1 Cache_1 Port_4 output ;\\nSDRAM_1 Processor_1 Port_4 output ;</td></tr><tr><td>Number_of_Samples</td><td>2</td><td>2</td></tr><tr><td>Statistics_to_Plot</td><td>&quot;Processor_1_PROC_Utilization_Min, Processor_1_PROC_Utilization_Mean, Processor_1_PROC_Utilization_Max&quot;</td><td>&quot;Processor_1_PROC_Utilization_Min, Processor_1_PROC_Utilization_Mean, Processor_1_PROC_Utilization_Max&quot;</td></tr><tr><td>Internal_Plot_Trace_Offset</td><td>2</td><td>2</td></tr><tr><td>Listen_to_Architecture_Options</td><td>None</td><td>None</td></tr></table> <h2>Processing2</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>Expression_List</td><td>/* Template to enter multiple RegEx lines */\\n\\ninput.A_Priority = Priority\\ninput.A_Task_Name = &quot;My_Task_1&quot;\\ninput.ID = input.ID + 100\\ninput.TIME = TNow\\n</td><td>/* Template to enter multiple RegEx lines */\\n\\ninput.A_Priority = Priority\\ninput.A_Task_Name = &quot;My_Task_1&quot;\\ninput.ID = input.ID + 100\\ninput.TIME = TNow\\n</td></tr><tr><td>Output_Ports</td><td>output</td><td>&quot;output&quot;</td></tr><tr><td>Output_Values</td><td>input</td><td>&quot;input&quot;</td></tr><tr><td>Priority</td><td>1</td><td>1</td></tr></table> <h2>Trans_Source2</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>Data_Structure_Name</td><td>&quot;Processor_DS&quot;</td><td>&quot;Processor_DS&quot;</td></tr><tr><td>Start_Time</td><td>0.0</td><td>0.0</td></tr><tr><td>Value_1</td><td>6.0E-03</td><td>0.006</td></tr><tr><td>Value_2</td><td>2.0</td><td>2.0</td></tr><tr><td>Random_Seed</td><td>123457L</td><td>123457L</td></tr><tr><td>Time_Distribution</td><td>Fixed (Value_1)</td><td>Fixed (Value_1)</td></tr></table> <h2>Processing</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>Expression_List</td><td>/* Template to enter multiple RegEx lines */\\ninput.A_Priority = Priority\\ninput.A_Task_Name = &quot;My_Task_1&quot;\\ninput.ID = input.ID\\ninput.TIME = TNow</td><td>/* Template to enter multiple RegEx lines */\\ninput.A_Priority = Priority\\ninput.A_Task_Name = &quot;My_Task_1&quot;\\ninput.ID = input.ID\\ninput.TIME = TNow</td></tr><tr><td>Output_Ports</td><td>output</td><td>&quot;output&quot;</td></tr><tr><td>Output_Values</td><td>input</td><td>&quot;input&quot;</td></tr><tr><td>Priority</td><td>0</td><td>0</td></tr></table> <h2>Trans_Source</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>Data_Structure_Name</td><td>&quot;Processor_DS&quot;</td><td>&quot;Processor_DS&quot;</td></tr><tr><td>Start_Time</td><td>0.0</td><td>0.0</td></tr><tr><td>Value_1</td><td>3.0E-03</td><td>0.003</td></tr><tr><td>Value_2</td><td>2.0</td><td>2.0</td></tr><tr><td>Random_Seed</td><td>123457L</td><td>123457L</td></tr><tr><td>Time_Distribution</td><td>Fixed (Value_1)</td><td>Fixed (Value_1)</td></tr></table>