DNN_Model_Mask_R_CNN_CPU

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DNN_Model_Mask_R_CNN_CPUmodel <h2>AIE_17</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>nInstances</td><td>Num_PE(0)*Num_PE(1)</td><td>168</td></tr><tr><td>showClones</td><td>false</td><td>false</td></tr><tr><td>PE_Name</td><td>&quot;PE_&quot;+row_ID+&quot;_&quot;+col_ID</td><td>&quot;PE_1_3&quot;</td></tr><tr><td>row_ID</td><td>instance/Num_PE(1)</td><td>1</td></tr><tr><td>col_ID</td><td>instance%Num_PE(1)</td><td>3</td></tr><tr><td>Clock_Speed_MHz</td><td>200.0</td><td>200.0</td></tr><tr><td>Power_Enable</td><td>Power_Enable</td><td>true</td></tr><tr><td>_hide</td><td>true</td><td>true</td></tr></table> <h2>AIE_16</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>nInstances</td><td>Num_PE(0)*Num_PE(1)</td><td>168</td></tr><tr><td>showClones</td><td>false</td><td>false</td></tr><tr><td>PE_Name</td><td>&quot;PE_&quot;+row_ID+&quot;_&quot;+col_ID</td><td>&quot;PE_1_2&quot;</td></tr><tr><td>row_ID</td><td>instance/Num_PE(1)</td><td>1</td></tr><tr><td>col_ID</td><td>instance%Num_PE(1)</td><td>2</td></tr><tr><td>Clock_Speed_MHz</td><td>200.0</td><td>200.0</td></tr><tr><td>Power_Enable</td><td>Power_Enable</td><td>true</td></tr><tr><td>_hide</td><td>true</td><td>true</td></tr></table> <h2>AIE_15</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>nInstances</td><td>Num_PE(0)*Num_PE(1)</td><td>168</td></tr><tr><td>showClones</td><td>false</td><td>false</td></tr><tr><td>PE_Name</td><td>&quot;PE_&quot;+row_ID+&quot;_&quot;+col_ID</td><td>&quot;PE_1_1&quot;</td></tr><tr><td>row_ID</td><td>instance/Num_PE(1)</td><td>1</td></tr><tr><td>col_ID</td><td>instance%Num_PE(1)</td><td>1</td></tr><tr><td>Clock_Speed_MHz</td><td>200.0</td><td>200.0</td></tr><tr><td>Power_Enable</td><td>Power_Enable</td><td>true</td></tr><tr><td>_hide</td><td>true</td><td>true</td></tr></table> <h2>AIE_14</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>nInstances</td><td>Num_PE(0)*Num_PE(1)</td><td>168</td></tr><tr><td>showClones</td><td>false</td><td>false</td></tr><tr><td>PE_Name</td><td>&quot;PE_&quot;+row_ID+&quot;_&quot;+col_ID</td><td>&quot;PE_1_0&quot;</td></tr><tr><td>row_ID</td><td>instance/Num_PE(1)</td><td>1</td></tr><tr><td>col_ID</td><td>instance%Num_PE(1)</td><td>0</td></tr><tr><td>Clock_Speed_MHz</td><td>200.0</td><td>200.0</td></tr><tr><td>Power_Enable</td><td>Power_Enable</td><td>true</td></tr><tr><td>_hide</td><td>true</td><td>true</td></tr></table> <h2>AIE_13</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>nInstances</td><td>Num_PE(0)*Num_PE(1)</td><td>168</td></tr><tr><td>showClones</td><td>false</td><td>false</td></tr><tr><td>PE_Name</td><td>&quot;PE_&quot;+row_ID+&quot;_&quot;+col_ID</td><td>&quot;PE_0_13&quot;</td></tr><tr><td>row_ID</td><td>instance/Num_PE(1)</td><td>0</td></tr><tr><td>col_ID</td><td>instance%Num_PE(1)</td><td>13</td></tr><tr><td>Clock_Speed_MHz</td><td>200.0</td><td>200.0</td></tr><tr><td>Power_Enable</td><td>Power_Enable</td><td>true</td></tr><tr><td>_hide</td><td>true</td><td>true</td></tr></table> <h2>AIE_12</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>nInstances</td><td>Num_PE(0)*Num_PE(1)</td><td>168</td></tr><tr><td>showClones</td><td>false</td><td>false</td></tr><tr><td>PE_Name</td><td>&quot;PE_&quot;+row_ID+&quot;_&quot;+col_ID</td><td>&quot;PE_0_12&quot;</td></tr><tr><td>row_ID</td><td>instance/Num_PE(1)</td><td>0</td></tr><tr><td>col_ID</td><td>instance%Num_PE(1)</td><td>12</td></tr><tr><td>Clock_Speed_MHz</td><td>200.0</td><td>200.0</td></tr><tr><td>Power_Enable</td><td>Power_Enable</td><td>true</td></tr><tr><td>_hide</td><td>true</td><td>true</td></tr></table> <h2>AIE_11</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>nInstances</td><td>Num_PE(0)*Num_PE(1)</td><td>168</td></tr><tr><td>showClones</td><td>false</td><td>false</td></tr><tr><td>PE_Name</td><td>&quot;PE_&quot;+row_ID+&quot;_&quot;+col_ID</td><td>&quot;PE_0_11&quot;</td></tr><tr><td>row_ID</td><td>instance/Num_PE(1)</td><td>0</td></tr><tr><td>col_ID</td><td>instance%Num_PE(1)</td><td>11</td></tr><tr><td>Clock_Speed_MHz</td><td>200.0</td><td>200.0</td></tr><tr><td>Power_Enable</td><td>Power_Enable</td><td>true</td></tr><tr><td>_hide</td><td>true</td><td>true</td></tr></table> <h2>AIE_10</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>nInstances</td><td>Num_PE(0)*Num_PE(1)</td><td>168</td></tr><tr><td>showClones</td><td>false</td><td>false</td></tr><tr><td>PE_Name</td><td>&quot;PE_&quot;+row_ID+&quot;_&quot;+col_ID</td><td>&quot;PE_0_10&quot;</td></tr><tr><td>row_ID</td><td>instance/Num_PE(1)</td><td>0</td></tr><tr><td>col_ID</td><td>instance%Num_PE(1)</td><td>10</td></tr><tr><td>Clock_Speed_MHz</td><td>200.0</td><td>200.0</td></tr><tr><td>Power_Enable</td><td>Power_Enable</td><td>true</td></tr><tr><td>_hide</td><td>true</td><td>true</td></tr></table> <h2>AIE_9</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>nInstances</td><td>Num_PE(0)*Num_PE(1)</td><td>168</td></tr><tr><td>showClones</td><td>false</td><td>false</td></tr><tr><td>PE_Name</td><td>&quot;PE_&quot;+row_ID+&quot;_&quot;+col_ID</td><td>&quot;PE_0_9&quot;</td></tr><tr><td>row_ID</td><td>instance/Num_PE(1)</td><td>0</td></tr><tr><td>col_ID</td><td>instance%Num_PE(1)</td><td>9</td></tr><tr><td>Clock_Speed_MHz</td><td>200.0</td><td>200.0</td></tr><tr><td>Power_Enable</td><td>Power_Enable</td><td>true</td></tr><tr><td>_hide</td><td>true</td><td>true</td></tr></table> <h2>AIE_8</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>nInstances</td><td>Num_PE(0)*Num_PE(1)</td><td>168</td></tr><tr><td>showClones</td><td>false</td><td>false</td></tr><tr><td>PE_Name</td><td>&quot;PE_&quot;+row_ID+&quot;_&quot;+col_ID</td><td>&quot;PE_0_8&quot;</td></tr><tr><td>row_ID</td><td>instance/Num_PE(1)</td><td>0</td></tr><tr><td>col_ID</td><td>instance%Num_PE(1)</td><td>8</td></tr><tr><td>Clock_Speed_MHz</td><td>200.0</td><td>200.0</td></tr><tr><td>Power_Enable</td><td>Power_Enable</td><td>true</td></tr><tr><td>_hide</td><td>true</td><td>true</td></tr></table> <h2>AIE_7</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>nInstances</td><td>Num_PE(0)*Num_PE(1)</td><td>168</td></tr><tr><td>showClones</td><td>false</td><td>false</td></tr><tr><td>PE_Name</td><td>&quot;PE_&quot;+row_ID+&quot;_&quot;+col_ID</td><td>&quot;PE_0_7&quot;</td></tr><tr><td>row_ID</td><td>instance/Num_PE(1)</td><td>0</td></tr><tr><td>col_ID</td><td>instance%Num_PE(1)</td><td>7</td></tr><tr><td>Clock_Speed_MHz</td><td>200.0</td><td>200.0</td></tr><tr><td>Power_Enable</td><td>Power_Enable</td><td>true</td></tr><tr><td>_hide</td><td>true</td><td>true</td></tr></table> <h2>AIE_6</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>nInstances</td><td>Num_PE(0)*Num_PE(1)</td><td>168</td></tr><tr><td>showClones</td><td>false</td><td>false</td></tr><tr><td>PE_Name</td><td>&quot;PE_&quot;+row_ID+&quot;_&quot;+col_ID</td><td>&quot;PE_0_6&quot;</td></tr><tr><td>row_ID</td><td>instance/Num_PE(1)</td><td>0</td></tr><tr><td>col_ID</td><td>instance%Num_PE(1)</td><td>6</td></tr><tr><td>Clock_Speed_MHz</td><td>200.0</td><td>200.0</td></tr><tr><td>Power_Enable</td><td>Power_Enable</td><td>true</td></tr><tr><td>_hide</td><td>true</td><td>true</td></tr></table> <h2>AIE_5</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>nInstances</td><td>Num_PE(0)*Num_PE(1)</td><td>168</td></tr><tr><td>showClones</td><td>false</td><td>false</td></tr><tr><td>PE_Name</td><td>&quot;PE_&quot;+row_ID+&quot;_&quot;+col_ID</td><td>&quot;PE_0_5&quot;</td></tr><tr><td>row_ID</td><td>instance/Num_PE(1)</td><td>0</td></tr><tr><td>col_ID</td><td>instance%Num_PE(1)</td><td>5</td></tr><tr><td>Clock_Speed_MHz</td><td>200.0</td><td>200.0</td></tr><tr><td>Power_Enable</td><td>Power_Enable</td><td>true</td></tr><tr><td>_hide</td><td>true</td><td>true</td></tr></table> <h2>AIE_4</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>nInstances</td><td>Num_PE(0)*Num_PE(1)</td><td>168</td></tr><tr><td>showClones</td><td>false</td><td>false</td></tr><tr><td>PE_Name</td><td>&quot;PE_&quot;+row_ID+&quot;_&quot;+col_ID</td><td>&quot;PE_0_4&quot;</td></tr><tr><td>row_ID</td><td>instance/Num_PE(1)</td><td>0</td></tr><tr><td>col_ID</td><td>instance%Num_PE(1)</td><td>4</td></tr><tr><td>Clock_Speed_MHz</td><td>200.0</td><td>200.0</td></tr><tr><td>Power_Enable</td><td>Power_Enable</td><td>true</td></tr><tr><td>_hide</td><td>true</td><td>true</td></tr></table> <h2>AIE_3</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>nInstances</td><td>Num_PE(0)*Num_PE(1)</td><td>168</td></tr><tr><td>showClones</td><td>false</td><td>false</td></tr><tr><td>PE_Name</td><td>&quot;PE_&quot;+row_ID+&quot;_&quot;+col_ID</td><td>&quot;PE_0_3&quot;</td></tr><tr><td>row_ID</td><td>instance/Num_PE(1)</td><td>0</td></tr><tr><td>col_ID</td><td>instance%Num_PE(1)</td><td>3</td></tr><tr><td>Clock_Speed_MHz</td><td>200.0</td><td>200.0</td></tr><tr><td>Power_Enable</td><td>Power_Enable</td><td>true</td></tr><tr><td>_hide</td><td>true</td><td>true</td></tr></table> <h2>AIE_2</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>nInstances</td><td>Num_PE(0)*Num_PE(1)</td><td>168</td></tr><tr><td>showClones</td><td>false</td><td>false</td></tr><tr><td>PE_Name</td><td>&quot;PE_&quot;+row_ID+&quot;_&quot;+col_ID</td><td>&quot;PE_0_2&quot;</td></tr><tr><td>row_ID</td><td>instance/Num_PE(1)</td><td>0</td></tr><tr><td>col_ID</td><td>instance%Num_PE(1)</td><td>2</td></tr><tr><td>Clock_Speed_MHz</td><td>200.0</td><td>200.0</td></tr><tr><td>Power_Enable</td><td>Power_Enable</td><td>true</td></tr><tr><td>_hide</td><td>true</td><td>true</td></tr></table> <h2>AIE_1</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>nInstances</td><td>Num_PE(0)*Num_PE(1)</td><td>168</td></tr><tr><td>showClones</td><td>false</td><td>false</td></tr><tr><td>PE_Name</td><td>&quot;PE_&quot;+row_ID+&quot;_&quot;+col_ID</td><td>&quot;PE_0_1&quot;</td></tr><tr><td>row_ID</td><td>instance/Num_PE(1)</td><td>0</td></tr><tr><td>col_ID</td><td>instance%Num_PE(1)</td><td>1</td></tr><tr><td>Clock_Speed_MHz</td><td>200.0</td><td>200.0</td></tr><tr><td>Power_Enable</td><td>Power_Enable</td><td>true</td></tr><tr><td>_hide</td><td>true</td><td>true</td></tr></table> <h2>Cortex_A53_Core2</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>Processor_Name</td><td>&quot;Cortex_A53_Core_&quot;+Core_Num</td><td>&quot;Cortex_A53_Core_2&quot;</td></tr><tr><td>ClockRate</td><td>Processor_Speed_MHz</td><td>1200.0</td></tr><tr><td>Core_Num</td><td>2</td><td>2</td></tr><tr><td>I_Cache_Name</td><td>&quot;I_Cache_Core_&quot;+Core_Num</td><td>&quot;I_Cache_Core_2&quot;</td></tr><tr><td>D_Cache_Name</td><td>&quot;D_Cache_Core_&quot;+Core_Num</td><td>&quot;D_Cache_Core_2&quot;</td></tr></table> <h2>Local_Bus_Port3</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>Architecture_Name</td><td>&quot;Architecture_1&quot;</td><td>&quot;Architecture_1&quot;</td></tr><tr><td>Bus_Name</td><td>&quot;Bus_1&quot;</td><td>&quot;Bus_1&quot;</td></tr><tr><td>Port_Name_1</td><td>&quot;Port_Name_7&quot;</td><td>&quot;Port_Name_7&quot;</td></tr><tr><td>Port_Name_2</td><td>&quot;Port_Name_8&quot;</td><td>&quot;Port_Name_8&quot;</td></tr><tr><td>FIFO_Buffers</td><td>8</td><td>8</td></tr><tr><td>Enable_Hello_Messages</td><td>true</td><td>true</td></tr></table> <h2>Local_Bus_Port2</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>Architecture_Name</td><td>&quot;Architecture_1&quot;</td><td>&quot;Architecture_1&quot;</td></tr><tr><td>Bus_Name</td><td>&quot;Bus_1&quot;</td><td>&quot;Bus_1&quot;</td></tr><tr><td>Port_Name_1</td><td>&quot;Port_Name_5&quot;</td><td>&quot;Port_Name_5&quot;</td></tr><tr><td>Port_Name_2</td><td>&quot;Port_Name_6&quot;</td><td>&quot;Port_Name_6&quot;</td></tr><tr><td>FIFO_Buffers</td><td>8</td><td>8</td></tr><tr><td>Enable_Hello_Messages</td><td>true</td><td>true</td></tr></table> <h2>ARMv8_Instruction_Set</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>&nbsp;</td><td>&nbsp;</td></tr><tr><td>Instruction_Set_Name</td><td>&quot;ARM_INSTR&quot;</td><td>&quot;ARM_INSTR&quot;</td></tr><tr><td>_explanation</td><td>ProcessorGenerator-&gt;Instruction_Set</td><td>ProcessorGenerator-&gt;Instruction_Set</td></tr><tr><td>fileOrURL</td><td>./arm_isa_a53_gem5.txt</td><td>&quot;./arm_isa_a53_gem5.txt&quot;</td></tr><tr><td>Instruction_Set_Text</td><td>/* Instruction Set or File Path. */<br/> Mnew Min Max ; /* Label */<br/> INT INT_1 INT_2 ; /* Parallel */<br/> begin INT_1 ; /* Group */<br/> ADD 1 ; <br/> SUB 1 ; <br/> MUL 2 ; <br/> DIV 2 ; <br/> end INT_1 ; <br/> begin INT_2 ; /* Group */<br/> ADD 3 ; <br/> SUB 3 ; <br/> MUL 4 ; <br/> DIV 4 ; <br/> end INT_2 ; <br/> begin FP_1 ; /* Group */<br/> ADD 1 4 ; <br/> SUB 1 4 ; <br/> MUL 2 8 ; <br/> DIV 2 8 ; <br/> end FP_1 ; <br/></td><td>/* Instruction Set or File Path. */<br/> Mnew Min Max ; /* Label */<br/> INT INT_1 INT_2 ; /* Parallel */<br/> begin INT_1 ; /* Group */<br/> ADD 1 ; <br/> SUB 1 ; <br/> MUL 2 ; <br/> DIV 2 ; <br/> end INT_1 ; <br/> begin INT_2 ; /* Group */<br/> ADD 3 ; <br/> SUB 3 ; <br/> MUL 4 ; <br/> DIV 4 ; <br/> end INT_2 ; <br/> begin FP_1 ; /* Group */<br/> ADD 1 4 ; <br/> SUB 1 4 ; <br/> MUL 2 8 ; <br/> DIV 2 8 ; <br/> end FP_1 ; <br/></td></tr><tr><td>Record_Set_Name</td><td>&quot;Record_Set_Name&quot;</td><td>&quot;Record_Set_Name&quot;</td></tr><tr><td>Memory_Type</td><td>Global</td><td>Global</td></tr></table> <h2>PostProcessing</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>fileOrURL</td><td>./PostProcessing.csv</td><td>&quot;./PostProcessing.csv&quot;</td></tr><tr><td>Target_Processor</td><td>Cortex_A53_Core_2</td><td>&quot;Cortex_A53_Core_2&quot;</td></tr><tr><td>Debug_Mode</td><td>false</td><td>false</td></tr></table> <h2>PreProcessing</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>fileOrURL</td><td>./PreProcessing.csv</td><td>&quot;./PreProcessing.csv&quot;</td></tr><tr><td>Target_Processor</td><td>Cortex_A53_Core_1</td><td>&quot;Cortex_A53_Core_1&quot;</td></tr><tr><td>Debug_Mode</td><td>false</td><td>false</td></tr></table> <h2>L2_Cache</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Cache_Name</td><td>&quot;L2&quot;</td><td>&quot;L2&quot;</td></tr><tr><td>Cache_Speed_Mhz</td><td>L2_Cache_Speed_Mhz</td><td>1200.0</td></tr><tr><td>Cache_Width_Bytes</td><td>16</td><td>16</td></tr><tr><td>Cache_Size_Bytes</td><td>1048576</td><td>1048576</td></tr><tr><td>Block_Size_Bytes</td><td>64</td><td>64</td></tr><tr><td>Cache_Type</td><td>D_Cache</td><td>&quot;D_Cache&quot;</td></tr><tr><td>Stochastic_or_Address_Based</td><td>Address_Based</td><td>&quot;Address_Based&quot;</td></tr><tr><td>Hit_Ratio</td><td>0.8</td><td>0.8</td></tr><tr><td>Loop_Ratio</td><td>0.2</td><td>0.2</td></tr><tr><td>Overhead_Cycles</td><td>0 /* For read and write set it as array {Read,Write}, eg: {1,3}*/</td><td>0</td></tr><tr><td>Input_Flow_Control</td><td>false</td><td>false</td></tr><tr><td>Req_Buffer_Size</td><td>16</td><td>16</td></tr><tr><td>Output_Flow_Control</td><td>false</td><td>false</td></tr><tr><td>Total_Outstanding</td><td>10</td><td>10</td></tr><tr><td>N_Way_Associativity</td><td>16</td><td>16</td></tr><tr><td>Cache_Replacement_Policy</td><td>Pseudo-LRU</td><td>&quot;Pseudo-LRU&quot;</td></tr><tr><td>Cache_Write_Policy</td><td>Write_Back</td><td>&quot;Write_Back&quot;</td></tr><tr><td>Inclusion_Policy</td><td>NINE /* Mandatory for L1 cache */</td><td>&quot;NINE /* Mandatory for L1 cache */&quot;</td></tr><tr><td>Miss_Memory_Name</td><td>&quot;DRAM&quot;</td><td>&quot;DRAM&quot;</td></tr><tr><td>Power_Manager_Name</td><td>&quot;Manager_1&quot; /*To analyse power, link the manager name */</td><td>&quot;Manager_1&quot;</td></tr><tr><td>No_of_Statistics</td><td>10</td><td>10</td></tr><tr><td>Word_Access</td><td>none</td><td>&quot;none&quot;</td></tr><tr><td>Total_Outstanding_Miss</td><td>10</td><td>10</td></tr><tr><td>N_Hits_Before_Prefetch</td><td>1</td><td>1</td></tr><tr><td>Main_Memory_Size_KB</td><td>4*1024*1024</td><td>4194304</td></tr></table> <h2>Local_Bus_Port</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>Architecture_Name</td><td>&quot;Architecture_1&quot;</td><td>&quot;Architecture_1&quot;</td></tr><tr><td>Bus_Name</td><td>&quot;Bus_1&quot;</td><td>&quot;Bus_1&quot;</td></tr><tr><td>Port_Name_1</td><td>&quot;Port_Name_3&quot;</td><td>&quot;Port_Name_3&quot;</td></tr><tr><td>Port_Name_2</td><td>&quot;Port_Name_4&quot;</td><td>&quot;Port_Name_4&quot;</td></tr><tr><td>FIFO_Buffers</td><td>8</td><td>8</td></tr><tr><td>Enable_Hello_Messages</td><td>true</td><td>true</td></tr></table> <h2>Local_Bus_Ports</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>Architecture_Name</td><td>&quot;Architecture_1&quot;</td><td>&quot;Architecture_1&quot;</td></tr><tr><td>Bus_Name</td><td>&quot;Bus_1&quot;</td><td>&quot;Bus_1&quot;</td></tr><tr><td>Port_Name_1</td><td>&quot;Port_1&quot;</td><td>&quot;Port_1&quot;</td></tr><tr><td>Port_Name_2</td><td>&quot;Port_2&quot;</td><td>&quot;Port_2&quot;</td></tr><tr><td>FIFO_Buffers</td><td>8</td><td>8</td></tr><tr><td>Enable_Hello_Messages</td><td>true</td><td>true</td></tr></table> <h2>Local_Bus</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>Architecture_Name</td><td>&quot;Architecture_1&quot;</td><td>&quot;Architecture_1&quot;</td></tr><tr><td>_explanation</td><td>HardwareDevices-&gt;BusArbiter</td><td>HardwareDevices-&gt;BusArbiter</td></tr><tr><td>Bus_Name</td><td>&quot;Bus_1&quot;</td><td>&quot;Bus_1&quot;</td></tr><tr><td>Bus_Speed_Mhz</td><td>Local_Bus_Speed_Mhz</td><td>1200.0</td></tr><tr><td>Burst_Size_Bytes</td><td>100</td><td>100</td></tr><tr><td>Round_Robin_Port_Array</td><td>{&quot;Bus_1_Port_1&quot;, &quot;Bus_1_Port_2&quot;}</td><td>{&quot;Bus_1_Port_1&quot;, &quot;Bus_1_Port_2&quot;}</td></tr><tr><td>Devices_Attached_to_Slave_by_Port</td><td>{{&quot;Device_1&quot;}, {&quot;Device_2&quot;}, {&quot;Device_3&quot;}, {&quot;Device_4&quot;}, {&quot;Device_5&quot;}, {&quot;Device_6&quot;}, {&quot;Device_7&quot;}, {&quot;Device_8&quot;}}</td><td>{{&quot;Device_1&quot;}, {&quot;Device_2&quot;}, {&quot;Device_3&quot;}, {&quot;Device_4&quot;}, {&quot;Device_5&quot;}, {&quot;Device_6&quot;}, {&quot;Device_7&quot;}, {&quot;Device_8&quot;}}</td></tr><tr><td>Width_Bytes</td><td>{16,32}</td><td>{16,32}</td></tr><tr><td>Arbiter_Mode</td><td>FCFS</td><td>FCFS</td></tr><tr><td>Split_Retry_Flag</td><td>true</td><td>true</td></tr><tr><td>Enable_Plots</td><td>false</td><td>false</td></tr></table> <h2>Cortex_A53_Core</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>Processor_Name</td><td>&quot;Cortex_A53_Core_&quot;+Core_Num</td><td>&quot;Cortex_A53_Core_1&quot;</td></tr><tr><td>ClockRate</td><td>Processor_Speed_MHz</td><td>1200.0</td></tr><tr><td>Core_Num</td><td>1</td><td>1</td></tr><tr><td>I_Cache_Name</td><td>&quot;I_Cache_Core_&quot;+Core_Num</td><td>&quot;I_Cache_Core_1&quot;</td></tr><tr><td>D_Cache_Name</td><td>&quot;D_Cache_Core_&quot;+Core_Num</td><td>&quot;D_Cache_Core_1&quot;</td></tr></table> <h2>Script</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>Block_Name</td><td>&quot;zero_count_sum&quot;</td><td>&quot;zero_count_sum&quot;</td></tr><tr><td>Optional_Parameters</td><td>/* First row contains Column Names. */<br/>Parameter_Name Parameter_Value <br/>Path VS/User_Library <br/>Read_File none <br/>Save_Files false <br/>Profile_File none <br/>Listen_to_File none <br/>Duplicate_Input true <br/>Profile 0 <br/>Maximum_Loops 1000000 <br/>Block_Reference Block_Name <br/>Port_Order_Array {&quot;input&quot;} <br/>Add_Scheduler_Times_to_DS false <br/></td><td>/* First row contains Column Names. */<br/>Parameter_Name Parameter_Value <br/>Path VS/User_Library <br/>Read_File none <br/>Save_Files false <br/>Profile_File none <br/>Listen_to_File none <br/>Duplicate_Input true <br/>Profile 0 <br/>Maximum_Loops 1000000 <br/>Block_Reference Block_Name <br/>Port_Order_Array {&quot;input&quot;} <br/>Add_Scheduler_Times_to_DS false <br/></td></tr><tr><td>Single_Cycle</td><td>false</td><td>false</td></tr><tr><td>Breakpoint</td><td>none</td><td>none</td></tr></table> <h2>RAM</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>Architecture_Name</td><td>&quot;Architecture_1&quot;</td><td>&quot;Architecture_1&quot;</td></tr><tr><td>Memory_Name</td><td>&quot;DRAM&quot;</td><td>&quot;DRAM&quot;</td></tr><tr><td>Memory_Speed_Mhz</td><td>500.0</td><td>500.0</td></tr><tr><td>Memory_Size_MBytes</td><td>64.0</td><td>64.0</td></tr><tr><td>Access_Time</td><td>&quot;Read 1000.0/Memory_Speed_Mhz, Prefetch 6.0, Write 1500.0/Memory_Speed_Mhz, ReadWrite 8.0, Erase 9.0&quot;</td><td>&quot;Read 1000.0/Memory_Speed_Mhz, Prefetch 6.0, Write 1500.0/Memory_Speed_Mhz, ReadWrite 8.0, Erase 9.0&quot;</td></tr><tr><td>FIFO_Buffers</td><td>32</td><td>32</td></tr><tr><td>Refresh_Rate_Cycles</td><td>16384</td><td>16384</td></tr><tr><td>Refresh_Cycles</td><td>32</td><td>32</td></tr><tr><td>Memory_Address</td><td>&quot;/* Format: Min_Address,Max_Address. Example:201,300 */&quot;</td><td>&quot;/* Format: Min_Address,Max_Address. Example:201,300 */&quot;</td></tr><tr><td>Controller_Time</td><td>&quot;Cycle_Time * 1.0&quot;</td><td>&quot;Cycle_Time * 1.0&quot;</td></tr><tr><td>Enable_Hello_Messages</td><td>true</td><td>true</td></tr><tr><td>Width_Bytes</td><td>1</td><td>1</td></tr><tr><td>Memory_Type</td><td>DDR4</td><td>DDR4</td></tr><tr><td>Refresh</td><td>true</td><td>true</td></tr></table> <h2>Output_Generated</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>/* Template to enter multiple RegEx lines*/<br/> Result_A = MyRegExpression_A_or_None /* Expression 1 */<br/> Result_B = MyRegExpression_B_or_None /* Expression 2 */<br/> Result_C = MyRegExpression_C_or_None /* Expression 3 */ <br/>/* Add as many RegEx lines are required */<br/></td><td>/* Template to enter multiple RegEx lines*/<br/> Result_A = MyRegExpression_A_or_None /* Expression 1 */<br/> Result_B = MyRegExpression_B_or_None /* Expression 2 */<br/> Result_C = MyRegExpression_C_or_None /* Expression 3 */ <br/>/* Add as many RegEx lines are required */<br/></td></tr><tr><td>Expression_List</td><td>/* Template to enter multiple RegEx lines*/</td><td>/* Template to enter multiple RegEx lines*/</td></tr><tr><td>Output_Ports</td><td>output</td><td>&quot;output&quot;</td></tr><tr><td>Output_Values</td><td>input</td><td>&quot;input&quot;</td></tr><tr><td>Output_Conditions</td><td>true</td><td>&quot;true&quot;</td></tr></table> <h2>Fully_Convolutional_Network</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr></table> <h2>ExpressionList</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>/* Template to enter multiple RegEx lines*/<br/> Result_A = MyRegExpression_A_or_None /* Expression 1 */<br/> Result_B = MyRegExpression_B_or_None /* Expression 2 */<br/> Result_C = MyRegExpression_C_or_None /* Expression 3 */ <br/>/* Add as many RegEx lines are required */<br/></td><td>/* Template to enter multiple RegEx lines*/<br/> Result_A = MyRegExpression_A_or_None /* Expression 1 */<br/> Result_B = MyRegExpression_B_or_None /* Expression 2 */<br/> Result_C = MyRegExpression_C_or_None /* Expression 3 */ <br/>/* Add as many RegEx lines are required */<br/></td></tr><tr><td>Expression_List</td><td>/* Template to enter multiple RegEx lines*/<br/><br/>latency = (TNow-input.TIME)<br/>fps = (1.0/latency)<br/>text = &quot;Mask R-CNN has completed excution - total latency = &quot;+latency+&quot; seconds =&gt; &quot;+fps+&quot; fps&quot;</td><td>/* Template to enter multiple RegEx lines*/<br/><br/>latency = (TNow-input.TIME)<br/>fps = (1.0/latency)<br/>text = &quot;Mask R-CNN has completed excution - total latency = &quot;+latency+&quot; seconds =&gt; &quot;+fps+&quot; fps&quot;</td></tr><tr><td>Output_Ports</td><td>output</td><td>&quot;output&quot;</td></tr><tr><td>Output_Values</td><td>text</td><td>&quot;text&quot;</td></tr><tr><td>Output_Conditions</td><td>true</td><td>&quot;true&quot;</td></tr></table> <h2>Power_Plot</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>Power_Setting_1</td><td>/* Power_Table. First row contains Column Names, expressions valid for entries except Device Name. <br/> where &quot;Scheduler_&quot; or &quot;STR_&quot; + BlockName; Processor, Bus, DRAM = Architecture_Name + &quot;_&quot; + BlockName <br/>--------Device Name------- ---------Power States------ -----Operating States------ --toActive-- --Speed-- --Exist-- */<br/>Architecture_Block Standby Active Wait Idle Down Existing OffState OnState t_OnOff Mhz Volts ; <br/>STR_AXI_Top_Rd_Data_Channel 50.0 200.0 2.0 1.0 0.0 Standby Standby Active Cycle_t 1000.0 1.0 ;<br/>STR_AXI_Top_Wr_Data_Channel 50.0 200.0 2.0 1.0 0.0 Standby Standby Active Cycle_t 1000.0 1.0 ;<br/>Architecture_1_Mem_Bus 20.0 50.0 1.0 0.0 0.0 Standby Standby Active Cycle_t 1000.0 1.0 ;<br/>Architecture_1_SRAM_Buffer 100.0 500.0 0.0 0.0 0.0 Standby Standby Active Cycle_t 1000.0 1.0 ;<br/>Architecture_1_DRAM 200.0 1000.0 0.0 0.0 0.0 Standby Standby Active Cycle_t 1000.0 1.0 ;<br/>Power_PE 10.0 50.0 0.0 0.0 0.0 Standby Standby Active Cycle_t 200.0 1.0 ;<br/>Architecture_1_Cortex_A53_Core_1 stdy act wat idl slp Standby Standby Active Cycle_t Processor_Speed_MHz 1.0 ; <br/>Cache_I_Cache_Core_1 \t \t\t 80.0 150.0 30.0 10.0 5.0 Standby Standby Active Cycle_t Processor_Speed_MHz 1.0 ;<br/>Cache_D_Cache_Core_1\t\t 80.0 150.0 30.0 10.0 5.0 Standby Standby Active Cycle_t Processor_Speed_MHz 1.0 ;<br/>Architecture_1_Cortex_A53_Core_2 stdy act wat idl slp Standby Standby Active Cycle_t Processor_Speed_MHz 1.0 ; <br/>Cache_I_Cache_Core_2 \t \t\t 80.0 150.0 30.0 10.0 5.0 Standby Standby Active Cycle_t Processor_Speed_MHz 1.0 ;<br/>Cache_D_Cache_Core_2\t\t 80.0 150.0 30.0 10.0 5.0 Standby Standby Active Cycle_t Processor_Speed_MHz 1.0 ;<br/>Cache_L2 100.0 250.0 40.0 20.0 5.0 Standby Standby Active Cycle_t Processor_Speed_MHz 1.0 ;<br/></td><td>&quot;/* Power_Table. First row contains Column Names, expressions valid for entries except Device Name. <br/> where &quot;Scheduler_&quot; or &quot;STR_&quot; + BlockName; Processor, Bus, DRAM = Architecture_Name + &quot;_&quot; + BlockName <br/>--------Device Name------- ---------Power States------ -----Operating States------ --toActive-- --Speed-- --Exist-- */<br/>Architecture_Block Standby Active Wait Idle Down Existing OffState OnState t_OnOff Mhz Volts ; <br/>STR_AXI_Top_Rd_Data_Channel 50.0 200.0 2.0 1.0 0.0 Standby Standby Active Cycle_t 1000.0 1.0 ;<br/>STR_AXI_Top_Wr_Data_Channel 50.0 200.0 2.0 1.0 0.0 Standby Standby Active Cycle_t 1000.0 1.0 ;<br/>Architecture_1_Mem_Bus 20.0 50.0 1.0 0.0 0.0 Standby Standby Active Cycle_t 1000.0 1.0 ;<br/>Architecture_1_SRAM_Buffer 100.0 500.0 0.0 0.0 0.0 Standby Standby Active Cycle_t 1000.0 1.0 ;<br/>Architecture_1_DRAM 200.0 1000.0 0.0 0.0 0.0 Standby Standby Active Cycle_t 1000.0 1.0 ;<br/>Power_PE 10.0 50.0 0.0 0.0 0.0 Standby Standby Active Cycle_t 200.0 1.0 ;<br/>Architecture_1_Cortex_A53_Core_1 stdy act wat idl slp Standby Standby Active Cycle_t Processor_Speed_MHz 1.0 ; <br/>Cache_I_Cache_Core_1 \t \t\t 80.0 150.0 30.0 10.0 5.0 Standby Standby Active Cycle_t Processor_Speed_MHz 1.0 ;<br/>Cache_D_Cache_Core_1\t\t 80.0 150.0 30.0 10.0 5.0 Standby Standby Active Cycle_t Processor_Speed_MHz 1.0 ;<br/>Architecture_1_Cortex_A53_Core_2 stdy act wat idl slp Standby Standby Active Cycle_t Processor_Speed_MHz 1.0 ; <br/>Cache_I_Cache_Core_2 \t \t\t 80.0 150.0 30.0 10.0 5.0 Standby Standby Active Cycle_t Processor_Speed_MHz 1.0 ;<br/>Cache_D_Cache_Core_2\t\t 80.0 150.0 30.0 10.0 5.0 Standby Standby Active Cycle_t Processor_Speed_MHz 1.0 ;<br/>Cache_L2 100.0 250.0 40.0 20.0 5.0 Standby Standby Active Cycle_t Processor_Speed_MHz 1.0 ;<br/>&quot;</td></tr><tr><td>Power_Setting_2</td><td>Architecture_Block Standby Active Wait Idle Down Existing OffState OnState t_OnOff Mhz Volts ; <br/>Power_PE 10.0 30.0 0.0 0.0 0.0 Standby Standby Active Cycle_t 200.0 1.0 ;</td><td>&quot;Architecture_Block Standby Active Wait Idle Down Existing OffState OnState t_OnOff Mhz Volts ; <br/>Power_PE 10.0 30.0 0.0 0.0 0.0 Standby Standby Active Cycle_t 200.0 1.0 ;&quot;</td></tr><tr><td>Power_Config</td><td>(Power_Enable == true)?Power_Setting_1:Power_Setting_2</td><td>&quot;/* Power_Table. First row contains Column Names, expressions valid for entries except Device Name. <br/> where &quot;Scheduler_&quot; or &quot;STR_&quot; + BlockName; Processor, Bus, DRAM = Architecture_Name + &quot;_&quot; + BlockName <br/>--------Device Name------- ---------Power States------ -----Operating States------ --toActive-- --Speed-- --Exist-- */<br/>Architecture_Block Standby Active Wait Idle Down Existing OffState OnState t_OnOff Mhz Volts ; <br/>STR_AXI_Top_Rd_Data_Channel 50.0 200.0 2.0 1.0 0.0 Standby Standby Active Cycle_t 1000.0 1.0 ;<br/>STR_AXI_Top_Wr_Data_Channel 50.0 200.0 2.0 1.0 0.0 Standby Standby Active Cycle_t 1000.0 1.0 ;<br/>Architecture_1_Mem_Bus 20.0 50.0 1.0 0.0 0.0 Standby Standby Active Cycle_t 1000.0 1.0 ;<br/>Architecture_1_SRAM_Buffer 100.0 500.0 0.0 0.0 0.0 Standby Standby Active Cycle_t 1000.0 1.0 ;<br/>Architecture_1_DRAM 200.0 1000.0 0.0 0.0 0.0 Standby Standby Active Cycle_t 1000.0 1.0 ;<br/>Power_PE 10.0 50.0 0.0 0.0 0.0 Standby Standby Active Cycle_t 200.0 1.0 ;<br/>Architecture_1_Cortex_A53_Core_1 stdy act wat idl slp Standby Standby Active Cycle_t Processor_Speed_MHz 1.0 ; <br/>Cache_I_Cache_Core_1 \t \t\t 80.0 150.0 30.0 10.0 5.0 Standby Standby Active Cycle_t Processor_Speed_MHz 1.0 ;<br/>Cache_D_Cache_Core_1\t\t 80.0 150.0 30.0 10.0 5.0 Standby Standby Active Cycle_t Processor_Speed_MHz 1.0 ;<br/>Architecture_1_Cortex_A53_Core_2 stdy act wat idl slp Standby Standby Active Cycle_t Processor_Speed_MHz 1.0 ; <br/>Cache_I_Cache_Core_2 \t \t\t 80.0 150.0 30.0 10.0 5.0 Standby Standby Active Cycle_t Processor_Speed_MHz 1.0 ;<br/>Cache_D_Cache_Core_2\t\t 80.0 150.0 30.0 10.0 5.0 Standby Standby Active Cycle_t Processor_Speed_MHz 1.0 ;<br/>Cache_L2 100.0 250.0 40.0 20.0 5.0 Standby Standby Active Cycle_t Processor_Speed_MHz 1.0 ;<br/>&quot;</td></tr></table> <h2>Shape_Parameters2</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>*.xml, *.csv files abs or rel (./) path<br/> -- *.csv real columns set to number<br/>Input_Fields == Lookup_Fields (num, type)<br/>Output_Expr: match, match_last, match_all<br/> -- match_all.field not allowed</td><td>*.xml, *.csv files abs or rel (./) path<br/> -- *.csv real columns set to number<br/>Input_Fields == Lookup_Fields (num, type)<br/>Output_Expr: match, match_last, match_all<br/> -- match_all.field not allowed</td></tr><tr><td>Linking_Name</td><td>&quot;Shape_Parameters_MRCNN&quot;</td><td>&quot;Shape_Parameters_MRCNN&quot;</td></tr><tr><td>fileOrURL</td><td>&nbsp;</td><td>&quot;&quot;</td></tr><tr><td>Data_Structure_Text</td><td>Layer H_W R_S E_F C M U m n e p q r t ifmap_gb_allocation psum_gb_allocation ;<br/>FMAPS 32 3 28 32 6 4 96 1 7 16 1 1 2 15872 73933 ;<br/>RPN 28 2 14 32 6 1 64 1 27 16 2 1 1 3891 93286 ;<br/>ROIALIGN 14 3 10 64 16 1 64 4 13 16 4 1 4 7168 86528 ;<br/>FCLAYERS 14 2 5 64 16 1 64 4 13 16 3 2 2 10752 86528 ;<br/>CONV1 32 3 28 32 6 4 96 1 7 16 1 1 2 15872 73933 ;<br/>POOL1 28 2 14 32 6 1 64 1 27 16 2 1 1 3891 93286 ;<br/>CONV2 14 3 10 64 16 1 64 4 13 16 4 1 4 7168 86528 ;<br/>POOL2 14 2 5 64 16 1 64 4 13 16 3 2 2 10752 86528 ;<br/>DECONV1 32 3 28 32 6 4 96 1 7 16 1 1 2 15872 73933 ;<br/>CONV3 28 2 14 32 6 1 64 1 27 16 2 1 1 3891 93286 ;<br/>DECONV2 14 3 10 64 16 1 64 4 13 16 4 1 4 7168 86528 ;<br/>CONV4 14 2 5 64 16 1 64 4 13 16 3 2 2 10752 86528 ;<br/></td><td>Layer H_W R_S E_F C M U m n e p q r t ifmap_gb_allocation psum_gb_allocation ;<br/>FMAPS 32 3 28 32 6 4 96 1 7 16 1 1 2 15872 73933 ;<br/>RPN 28 2 14 32 6 1 64 1 27 16 2 1 1 3891 93286 ;<br/>ROIALIGN 14 3 10 64 16 1 64 4 13 16 4 1 4 7168 86528 ;<br/>FCLAYERS 14 2 5 64 16 1 64 4 13 16 3 2 2 10752 86528 ;<br/>CONV1 32 3 28 32 6 4 96 1 7 16 1 1 2 15872 73933 ;<br/>POOL1 28 2 14 32 6 1 64 1 27 16 2 1 1 3891 93286 ;<br/>CONV2 14 3 10 64 16 1 64 4 13 16 4 1 4 7168 86528 ;<br/>POOL2 14 2 5 64 16 1 64 4 13 16 3 2 2 10752 86528 ;<br/>DECONV1 32 3 28 32 6 4 96 1 7 16 1 1 2 15872 73933 ;<br/>CONV3 28 2 14 32 6 1 64 1 27 16 2 1 1 3891 93286 ;<br/>DECONV2 14 3 10 64 16 1 64 4 13 16 4 1 4 7168 86528 ;<br/>CONV4 14 2 5 64 16 1 64 4 13 16 3 2 2 10752 86528 ;<br/></td></tr><tr><td>Input_Fields</td><td>&quot;Layer&quot;</td><td>&quot;Layer&quot;</td></tr><tr><td>Lookup_Fields</td><td>&quot;Layer&quot;</td><td>&quot;Layer&quot;</td></tr><tr><td>Output_Expression</td><td>&quot;output = match&quot; /* FORMAT output = match.fieldb */</td><td>&quot;output = match&quot;</td></tr><tr><td>Mode</td><td>Read</td><td>Read</td></tr></table> <h2>Scheduler</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr></table> <h2>AIE</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>nInstances</td><td>Num_PE(0)*Num_PE(1)</td><td>168</td></tr><tr><td>showClones</td><td>false</td><td>false</td></tr><tr><td>PE_Name</td><td>&quot;PE_&quot;+row_ID+&quot;_&quot;+col_ID</td><td>&quot;PE_0_0&quot;</td></tr><tr><td>row_ID</td><td>instance/Num_PE(1)</td><td>0</td></tr><tr><td>col_ID</td><td>instance%Num_PE(1)</td><td>0</td></tr><tr><td>Clock_Speed_MHz</td><td>200.0</td><td>200.0</td></tr><tr><td>Power_Enable</td><td>Power_Enable</td><td>true</td></tr></table> <h2>layerSet4</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>/* Template to enter multiple RegEx lines*/<br/> Result_A = MyRegExpression_A_or_None /* Expression 1 */<br/> Result_B = MyRegExpression_B_or_None /* Expression 2 */<br/> Result_C = MyRegExpression_C_or_None /* Expression 3 */ <br/>/* Add as many RegEx lines are required */<br/></td><td>/* Template to enter multiple RegEx lines*/<br/> Result_A = MyRegExpression_A_or_None /* Expression 1 */<br/> Result_B = MyRegExpression_B_or_None /* Expression 2 */<br/> Result_C = MyRegExpression_C_or_None /* Expression 3 */ <br/>/* Add as many RegEx lines are required */<br/></td></tr><tr><td>Expression_List</td><td>/* Template to enter multiple RegEx lines*/<br/>input.Layer=&quot;FCLAYERS&quot;</td><td>/* Template to enter multiple RegEx lines*/<br/>input.Layer=&quot;FCLAYERS&quot;</td></tr><tr><td>Output_Ports</td><td>output</td><td>&quot;output&quot;</td></tr><tr><td>Output_Values</td><td>input</td><td>&quot;input&quot;</td></tr><tr><td>Output_Conditions</td><td>true</td><td>&quot;true&quot;</td></tr></table> <h2>FC_Layers</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>Target_Resource</td><td>PE_Scheduler</td><td>&quot;PE_Scheduler&quot;</td></tr><tr><td>Task_Number</td><td>1</td><td>&quot;1&quot;</td></tr><tr><td>Task_Priority</td><td>1</td><td>&quot;1&quot;</td></tr><tr><td>Task_Time</td><td>100.0e-6</td><td>&quot;100.0e-6&quot;</td></tr><tr><td>Task_Plot_ID</td><td>1</td><td>1</td></tr></table> <h2>layerSet3</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>/* Template to enter multiple RegEx lines*/<br/> Result_A = MyRegExpression_A_or_None /* Expression 1 */<br/> Result_B = MyRegExpression_B_or_None /* Expression 2 */<br/> Result_C = MyRegExpression_C_or_None /* Expression 3 */ <br/>/* Add as many RegEx lines are required */<br/></td><td>/* Template to enter multiple RegEx lines*/<br/> Result_A = MyRegExpression_A_or_None /* Expression 1 */<br/> Result_B = MyRegExpression_B_or_None /* Expression 2 */<br/> Result_C = MyRegExpression_C_or_None /* Expression 3 */ <br/>/* Add as many RegEx lines are required */<br/></td></tr><tr><td>Expression_List</td><td>/* Template to enter multiple RegEx lines*/<br/>input.Layer=&quot;ROIALIGN&quot;</td><td>/* Template to enter multiple RegEx lines*/<br/>input.Layer=&quot;ROIALIGN&quot;</td></tr><tr><td>Output_Ports</td><td>output</td><td>&quot;output&quot;</td></tr><tr><td>Output_Values</td><td>input</td><td>&quot;input&quot;</td></tr><tr><td>Output_Conditions</td><td>true</td><td>&quot;true&quot;</td></tr></table> <h2>RoIAlign</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>Target_Resource</td><td>PE_Scheduler</td><td>&quot;PE_Scheduler&quot;</td></tr><tr><td>Task_Number</td><td>1</td><td>&quot;1&quot;</td></tr><tr><td>Task_Priority</td><td>1</td><td>&quot;1&quot;</td></tr><tr><td>Task_Time</td><td>100.0e-6</td><td>&quot;100.0e-6&quot;</td></tr><tr><td>Task_Plot_ID</td><td>1</td><td>1</td></tr></table> <h2>layerSet2</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>/* Template to enter multiple RegEx lines*/<br/> Result_A = MyRegExpression_A_or_None /* Expression 1 */<br/> Result_B = MyRegExpression_B_or_None /* Expression 2 */<br/> Result_C = MyRegExpression_C_or_None /* Expression 3 */ <br/>/* Add as many RegEx lines are required */<br/></td><td>/* Template to enter multiple RegEx lines*/<br/> Result_A = MyRegExpression_A_or_None /* Expression 1 */<br/> Result_B = MyRegExpression_B_or_None /* Expression 2 */<br/> Result_C = MyRegExpression_C_or_None /* Expression 3 */ <br/>/* Add as many RegEx lines are required */<br/></td></tr><tr><td>Expression_List</td><td>/* Template to enter multiple RegEx lines*/<br/>input.Layer=&quot;RPN&quot;</td><td>/* Template to enter multiple RegEx lines*/<br/>input.Layer=&quot;RPN&quot;</td></tr><tr><td>Output_Ports</td><td>output</td><td>&quot;output&quot;</td></tr><tr><td>Output_Values</td><td>input</td><td>&quot;input&quot;</td></tr><tr><td>Output_Conditions</td><td>true</td><td>&quot;true&quot;</td></tr></table> <h2>RPN</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>Target_Resource</td><td>PE_Scheduler</td><td>&quot;PE_Scheduler&quot;</td></tr><tr><td>Task_Number</td><td>1</td><td>&quot;1&quot;</td></tr><tr><td>Task_Priority</td><td>1</td><td>&quot;1&quot;</td></tr><tr><td>Task_Time</td><td>100.0e-6</td><td>&quot;100.0e-6&quot;</td></tr><tr><td>Task_Plot_ID</td><td>1</td><td>1</td></tr></table> <h2>System_Stats</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>ViewText</td><td>View_All_Stats</td><td>true</td></tr><tr><td>saveText</td><td>true</td><td>true</td></tr><tr><td>Append_Time</td><td>true</td><td>true</td></tr><tr><td>fileName</td><td>&quot;Run_&quot;+Run+&quot;_System_Stats.txt&quot;</td><td>&quot;&quot;Run_&quot;+Run+&quot;_System_Stats.txt&quot;&quot;</td></tr><tr><td>rowsDisplayed</td><td>10</td><td>10</td></tr><tr><td>columnsDisplayed</td><td>40</td><td>40</td></tr><tr><td>suppressBlankLines</td><td>false</td><td>false</td></tr><tr><td>title</td><td>&nbsp;</td><td>&nbsp;</td></tr></table> <h2>Global_Network_director</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr></table> <h2>layerSet</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>/* Template to enter multiple RegEx lines*/<br/> Result_A = MyRegExpression_A_or_None /* Expression 1 */<br/> Result_B = MyRegExpression_B_or_None /* Expression 2 */<br/> Result_C = MyRegExpression_C_or_None /* Expression 3 */ <br/>/* Add as many RegEx lines are required */<br/></td><td>/* Template to enter multiple RegEx lines*/<br/> Result_A = MyRegExpression_A_or_None /* Expression 1 */<br/> Result_B = MyRegExpression_B_or_None /* Expression 2 */<br/> Result_C = MyRegExpression_C_or_None /* Expression 3 */ <br/>/* Add as many RegEx lines are required */<br/></td></tr><tr><td>Expression_List</td><td>/* Template to enter multiple RegEx lines*/<br/>input.Layer=&quot;FMAPS&quot;</td><td>/* Template to enter multiple RegEx lines*/<br/>input.Layer=&quot;FMAPS&quot;</td></tr><tr><td>Output_Ports</td><td>output</td><td>&quot;output&quot;</td></tr><tr><td>Output_Values</td><td>input</td><td>&quot;input&quot;</td></tr><tr><td>Output_Conditions</td><td>true</td><td>&quot;true&quot;</td></tr></table> <h2>FeatureMaps</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>Target_Resource</td><td>PE_Scheduler</td><td>&quot;PE_Scheduler&quot;</td></tr><tr><td>Task_Number</td><td>1</td><td>&quot;1&quot;</td></tr><tr><td>Task_Priority</td><td>1</td><td>&quot;1&quot;</td></tr><tr><td>Task_Time</td><td>100.0e-6</td><td>&quot;100.0e-6&quot;</td></tr><tr><td>Task_Plot_ID</td><td>1</td><td>1</td></tr></table> <h2>Compression</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>Clock_Speed_MHz</td><td>200.0</td><td>200.0</td></tr><tr><td>Delay_Cycles</td><td>200</td><td>200</td></tr><tr><td>_flipPortsVertical</td><td>true</td><td>true</td></tr><tr><td>_flipPortsHorizontal</td><td>false</td><td>false</td></tr><tr><td>_rotatePorts</td><td>180</td><td>180</td></tr></table> <h2>ArchitectureSetup</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Source_Node Destination_Node Hop Source_Port ; <br/>Processor_1 Cache_1 Port_1 bus_out2 ;<br/>Cache_1 Processor_1 Port_2 output ;<br/>Cache_1 SDRAM_1 Port_2 output ;<br/>SDRAM_1 Cache_1 Port_4 output ;<br/>SDRAM_1 Processor_1 Port_4 output ;</td><td>Source_Node Destination_Node Hop Source_Port ; <br/>Processor_1 Cache_1 Port_1 bus_out2 ;<br/>Cache_1 Processor_1 Port_2 output ;<br/>Cache_1 SDRAM_1 Port_2 output ;<br/>SDRAM_1 Cache_1 Port_4 output ;<br/>SDRAM_1 Processor_1 Port_4 output ;</td></tr><tr><td>Architecture_Name</td><td>&quot;Architecture_1&quot;</td><td>&quot;Architecture_1&quot;</td></tr><tr><td>Routing_Table</td><td>/* First row contains Column Names. */</td><td>/* First row contains Column Names. */</td></tr><tr><td>Number_of_Samples</td><td>2</td><td>2</td></tr><tr><td>Statistics_to_Plot</td><td>&quot;Processor_1_PROC_Utilization_Pct_Min, Processor_1_PROC_Utilization_Pct_Mean, Processor_1_PROC_Utilization_Pct_Max&quot;</td><td>&quot;Processor_1_PROC_Utilization_Pct_Min, Processor_1_PROC_Utilization_Pct_Mean, Processor_1_PROC_Utilization_Pct_Max&quot;</td></tr><tr><td>Internal_Plot_Trace_Offset</td><td>2</td><td>2</td></tr><tr><td>Listen_to_Architecture_Options</td><td>None</td><td>None</td></tr><tr><td>Field_Name_Mapping</td><td>/* First row contains Column Names. */<br/>External_Field_Name Internal_Field_Name ; <br/>A_Address A_Address ; <br/>A_Bytes A_Bytes ; <br/>A_Data A_Data ; <br/>A_IDX A_IDX ; <br/>A_Instruction A_Instruction ; <br/>A_Priority A_Priority ; <br/>A_Source A_Source ; <br/>A_Destination A_Destination ; <br/>A_Task_ID A_Task_ID ; <br/>A_Time A_Time ; <br/></td><td>/* First row contains Column Names. */<br/>External_Field_Name Internal_Field_Name ; <br/>A_Address A_Address ; <br/>A_Bytes A_Bytes ; <br/>A_Data A_Data ; <br/>A_IDX A_IDX ; <br/>A_Instruction A_Instruction ; <br/>A_Priority A_Priority ; <br/>A_Source A_Source ; <br/>A_Destination A_Destination ; <br/>A_Task_ID A_Task_ID ; <br/>A_Time A_Time ; <br/></td></tr></table> <h2>Task_Done</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>ViewText</td><td>View_All_Stats</td><td>true</td></tr><tr><td>saveText</td><td>true</td><td>true</td></tr><tr><td>Append_Time</td><td>true</td><td>true</td></tr><tr><td>fileName</td><td>&quot;Run_&quot;+Run+&quot;_Task_Done.txt&quot;</td><td>&quot;&quot;Run_&quot;+Run+&quot;_Task_Done.txt&quot;&quot;</td></tr><tr><td>rowsDisplayed</td><td>10</td><td>10</td></tr><tr><td>columnsDisplayed</td><td>40</td><td>40</td></tr><tr><td>suppressBlankLines</td><td>false</td><td>false</td></tr><tr><td>title</td><td>&nbsp;</td><td>&nbsp;</td></tr></table> <h2>Write_to_DRAM</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>Target_Resource</td><td>DMA_Offchip_Scheduler</td><td>&quot;DMA_Offchip_Scheduler&quot;</td></tr><tr><td>Task_Number</td><td>1</td><td>&quot;1&quot;</td></tr><tr><td>Task_Priority</td><td>1</td><td>&quot;1&quot;</td></tr><tr><td>Task_Time</td><td>0.0</td><td>&quot;0.0&quot;</td></tr><tr><td>Task_Plot_ID</td><td>1</td><td>1</td></tr></table> <h2>field_set</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>/* Template to enter multiple RegEx lines*/<br/> Result_A = MyRegExpression_A_or_None /* Expression 1 */<br/> Result_B = MyRegExpression_B_or_None /* Expression 2 */<br/> Result_C = MyRegExpression_C_or_None /* Expression 3 */ <br/>/* Add as many RegEx lines are required */<br/></td><td>/* Template to enter multiple RegEx lines*/<br/> Result_A = MyRegExpression_A_or_None /* Expression 1 */<br/> Result_B = MyRegExpression_B_or_None /* Expression 2 */<br/> Result_C = MyRegExpression_C_or_None /* Expression 3 */ <br/>/* Add as many RegEx lines are required */<br/></td></tr><tr><td>Expression_List</td><td>/* Template to enter multiple RegEx lines*/<br/>input.A_DMA_Command = {&quot;Write&quot;}<br/>input.A_DMA_Destination = {&quot;DRAM&quot;}<br/>input.A_DMA_Bytes = {32*32}<br/>input.A_DMA_Burst_Bytes = {1024}<br/>input.A_DMA_Channel = {1}</td><td>/* Template to enter multiple RegEx lines*/<br/>input.A_DMA_Command = {&quot;Write&quot;}<br/>input.A_DMA_Destination = {&quot;DRAM&quot;}<br/>input.A_DMA_Bytes = {32*32}<br/>input.A_DMA_Burst_Bytes = {1024}<br/>input.A_DMA_Channel = {1}</td></tr><tr><td>Output_Ports</td><td>output</td><td>&quot;output&quot;</td></tr><tr><td>Output_Values</td><td>input</td><td>&quot;input&quot;</td></tr><tr><td>Output_Conditions</td><td>true</td><td>&quot;true&quot;</td></tr></table> <h2>Input_Images</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>Data_Structure_Name</td><td>&quot;Processor_DS&quot;</td><td>&quot;Processor_DS&quot;</td></tr><tr><td>fileOrURL</td><td>&nbsp;</td><td>&quot;&quot;</td></tr><tr><td>Start_Time</td><td>1.0e-3</td><td>1.0E-3</td></tr><tr><td>Value_1</td><td>1.0</td><td>1.0</td></tr><tr><td>Value_2</td><td>2.0</td><td>2.0</td></tr><tr><td>Random_Seed</td><td>123457L</td><td>123457L</td></tr><tr><td>Time_Distribution</td><td>Single Event</td><td>Single Event</td></tr><tr><td>Number_of_Transactions</td><td>MaxInt</td><td>&quot;MaxInt&quot;</td></tr></table> <h2>DMA2</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>DMA_Speed_MHz</td><td>400.0</td><td>400.0</td></tr><tr><td>Number_of_Channels</td><td>3</td><td>3</td></tr><tr><td>DMA_Channel_Buffer_Size</td><td>16</td><td>16</td></tr><tr><td>DMA_Width_Bytes</td><td>8</td><td>8</td></tr><tr><td>DMA_Name</td><td>&quot;DMA_Onchip&quot;</td><td>&quot;DMA_Onchip&quot;</td></tr></table> <h2>Offchip_Bus</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Architecture_Name</td><td>&quot;Architecture_1&quot;</td><td>&quot;Architecture_1&quot;</td></tr><tr><td>Bus_Name</td><td>&quot;AXI_Top&quot;</td><td>&quot;AXI_Top&quot;</td></tr><tr><td>AXI_Speed_Mhz</td><td>200.0</td><td>200.0</td></tr><tr><td>AXI_Cycle_Time</td><td>1.0E-06 / AXI_Speed_Mhz</td><td>5.0E-9</td></tr><tr><td>_explanation</td><td>Interfaces and Buses-&gt;AHB-&gt;AXI_Bus</td><td>Interfaces and Buses-&gt;AHB-&gt;AXI_Bus</td></tr><tr><td>Bus_Width</td><td>8</td><td>8</td></tr><tr><td>Read_Threshold</td><td>200000</td><td>200000</td></tr><tr><td>Write_Threshold</td><td>200000</td><td>200000</td></tr><tr><td>Master_Request_Threshold</td><td>{20000,200000,20000,20,20,20,2,2,2,2,2,2,2,2,2,2} </td><td>{20000, 200000, 20000, 20, 20, 20, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2}</td></tr><tr><td>Number_Masters</td><td>16</td><td>16</td></tr><tr><td>Number_Slaves</td><td>8</td><td>8</td></tr><tr><td>Threshold_Trans_T_Bytes_F</td><td>true</td><td>true</td></tr><tr><td>Arbiter_FIX_1_RR_2_CUSTOM_3</td><td>1</td><td>1</td></tr><tr><td>Slave_Speeds_Mhz</td><td>{AXI_Speed_Mhz, AXI_Speed_Mhz, AXI_Speed_Mhz, AXI_Speed_Mhz,AXI_Speed_Mhz, AXI_Speed_Mhz, AXI_Speed_Mhz, AXI_Speed_Mhz}</td><td>{200.0, 200.0, 200.0, 200.0, 200.0, 200.0, 200.0, 200.0}</td></tr><tr><td>Extra_Cycles_for_RdReq_WrReq_RdData_WrData</td><td>{0, 0, 0, 0, 0, 0, 0, 0}</td><td>{0, 0, 0, 0, 0, 0, 0, 0}</td></tr><tr><td>Devices_Attached_to_Slave_by_Port</td><td>{{&quot;DRAM&quot;},{&quot;Device_2&quot;},{&quot;Device_3&quot;},{&quot;Device_4&quot;},{&quot;Device_5&quot;},{&quot;Device_6&quot;},{&quot;Device_7&quot;},{&quot;Device_8&quot;}}</td><td>{{&quot;DRAM&quot;}, {&quot;Device_2&quot;}, {&quot;Device_3&quot;}, {&quot;Device_4&quot;}, {&quot;Device_5&quot;}, {&quot;Device_6&quot;}, {&quot;Device_7&quot;}, {&quot;Device_8&quot;}}</td></tr><tr><td>Master_Throttle_Enable</td><td>{false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false}</td><td>{false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false}</td></tr><tr><td>Slave_Throttle_Enable</td><td>{false,false,false,false,false,false,false,false} </td><td>{false, false, false, false, false, false, false, false}</td></tr><tr><td>DEBUG</td><td>false</td><td>false</td></tr><tr><td>Custom_Arbiter_File</td><td>&quot;none&quot;</td><td>&quot;none&quot;</td></tr><tr><td>Custom_Arbiter_Path</td><td>&quot;none&quot;</td><td>&quot;none&quot;</td></tr><tr><td>Fixed_Priority_Array</td><td>{{1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16},{1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16},{1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16},{1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16},{1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16},{1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16},{1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16},{1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16}}</td><td>{{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16}, {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16}, {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16}, {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16}, {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16}, {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16}, {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16}, {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16}}</td></tr><tr><td>Custom_Slave_File</td><td>&quot;none&quot;</td><td>&quot;none&quot;</td></tr><tr><td>Ports_to_Plot</td><td>{{1,1}} /* {{n,m},{}..} - nth master, mth slave */</td><td>{{1, 1}}</td></tr><tr><td>AXI_Sync_Speed_Mhz</td><td>AXI_Speed_Mhz</td><td>200.0</td></tr><tr><td>Power_Manager_Name</td><td>&quot;none&quot;</td><td>&quot;none&quot;</td></tr><tr><td>Enable_Plots</td><td>false</td><td>false</td></tr></table> <h2>SRAM_Buffer</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>Buffer_Clock_Speed_MHz</td><td>200.0</td><td>200.0</td></tr></table> <h2>ReLU</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>Clock_Speed_MHz</td><td>200.0</td><td>200.0</td></tr><tr><td>Delay_Cycles</td><td>2000</td><td>2000</td></tr><tr><td>_flipPortsVertical</td><td>true</td><td>true</td></tr><tr><td>_flipPortsHorizontal</td><td>false</td><td>false</td></tr><tr><td>_rotatePorts</td><td>180</td><td>180</td></tr></table> <h2>DeCompression</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>Clock_Speed_MHz</td><td>200.0</td><td>200.0</td></tr><tr><td>Delay_Cycles</td><td>200</td><td>200</td></tr></table> <h2>FIFO</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>_hideName</td><td>true</td><td>true</td></tr></table> <h2>IO_DMA</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>DMA_Speed_MHz</td><td>400.0</td><td>400.0</td></tr><tr><td>Number_of_Channels</td><td>3</td><td>3</td></tr><tr><td>DMA_Channel_Buffer_Size</td><td>16</td><td>16</td></tr><tr><td>DMA_Width_Bytes</td><td>8</td><td>8</td></tr><tr><td>DMA_Name</td><td>&quot;DMA_Offchip&quot;</td><td>&quot;DMA_Offchip&quot;</td></tr></table>