System C

VisualSim provides a set of SystemC interface blocks that facilitates the user to export their SystemC code into a VisualSim model. User can also co-simulate the model with wide range of other VisualSim utility blocks.  Utility blocks includes the interface blocks to the programming languages like C/C++, hardware description languages (HDL’s) like Verilog & VHDL that are widely used in the system level design. These blocks can be used to create SystemC models faster and it is easy to create models with wide range of existing block libraries, advanced GUI (Graphical User Interface) and helps you to view the SystemC language at a higher level of abstraction. It offers automated templates that helps to eliminate some of the "setup" code that would otherwise be necessary for a SystemC program. Despite the SystemC models created in VisualSim, it can still be ported to other tools because we strictly adhere to the Open SystemC Initiative (OSCI). This document provides the fundamental details on how to export the SystemC code into a VisualSim model. All example models given in this document are available under the demo directory.

What is SystemC?

The SystemC Class Library has been developed to support system level design and it provides all the necessary modeling facilities to describe systems similar to those that can be described using a hardware description language, such as VHDL. The Library provides a simulation kernel, data types appropriate for fixed-point arithmetic, communication channels which behave like pieces of wire (signals), and modules to break down a design into smaller parts. If you are not familiar with SystemC, we recommend to learn the basics before proceeding click the URL http://www.systemc.org. Also there is yet another tutorial by DOULOS which can get you familiar with the SystemC basics in a fast track http://www.doulos.com/knowhow/systemc/tutorial. You can find the real difference of using our SystemC blocksets with additional functionality and advanced GUI.

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