• Would you like to estimate the full SoC power consumed by an application or use case?
• Would like to test the power management strategy prior to development?
• Would you like the system model to generate Systemverilog, VCD & UPF files for verification?
• Would you like a platform to trade-off Power and Performance to achieve the requirements?

Power is the biggest factor impacting semiconductors from custom silicon to CPU/GPU products. System-level Power modeling and simulation is needed to measure power accurately and efficiently. The scope of power studies has expanded to include the software, thermal and generation to feed into the UVM/UPF methodology.  In this Webinar we highlighted a new system-level power methodology that integrates micro-architecture power storage, consumption, management and thermal assessments.  Case studies were presented on Chiplet power, mapping strategy of DNN on AI Engines and Tensor cores, hardware-software partitioning, and testing power management for mobile and low-power devices.