Processor architecture is the most complex piece of electronics. There are so many variations of processing- CPU, GPU, TPU, NPU, DSP and AI Accelerators. The cache/memory, bus topology and software partitioning is heavily oriented towards the application. Designing processors require significant knowledge of the execution pipeline, buffering, load/store, branch prediction, dispatcher, out-of-order and SIMD/MIMD. To size […]

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Most product design fail because of communication inconsistency. 25 years ago Scott McNealy did not permit PowerPoint in any meeting at Sun Microsystems. Rumour has it that Jeff Bezos does not permit the use of PowerPoint during meetings at Amazon. PowerPoint is good for high-level presentations to executives, and folks that do not have to […]

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SysML is a fantastic way to capture the use cases, requirements and even the architecture. Now you can simulate these diagrams against system models of electronics and networks using VisualSim Architect. This new capability enables designers to evaluate the feasbility, size the system, identify inefficiency, measure quality-of-service and evaluate reliability with failure cases. In this […]

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Tom Jose and Deepak Shankar are delighted to welcome you to the presentation of our research paper titled “Practical solution to scaling and analyzing a 124 node in-vehicle multi-protocol network” . The paper will be presented at the Automotive Ethernet Conference in Munich, Germany from March 22 at 1700 Hours. To view this in a […]

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