Cyber-Physical System Design from Mirabilis Design

Mar 10, 2023  |  Author : admin_mirabilis
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Overview Mirabilis Design is the eco-system for cyber-physical system design with an integrated communication, test, and exploration from requirements to deployment.  VisualSim Architect brings together all engineering disciplines in a single multi-simulator environment to assign software tasks to compute resources, optimize the compute resource, design the network topology of boards, and connect with other simulators […]

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Architecture Exploration of Artificial Intelligence/Machine Learning Applications and Processors

Sep 03, 2020  |  Author : admin_mirabilis
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Industry Background Artificial Intelligence (AI) applications take into consideration the compute, storage, memory, pipeline, communication interface, software, and control. Further, AI application processing can be distributed across multi-core within processors, multiple processor boards on a PCIe backbone, computers distributed across an ethernet network, high-performance computers, or systems across a data center. In addition, AI processors […]

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Architecture Exploration of ARM-based SoC and Chiplets

Mar 15, 2025  |  Author : admin_mirabilis
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Unlocking Optimal Power and Performance: A Deep Dive into ARM SoC Modeling In the competitive world of semiconductor design, balancing power consumption with high performance is a constant challenge. With VisualSim Architect, engineers can simulate intricate ARM-based SoCs with unparalleled accuracy, paving the way for innovative, power-efficient solutions. The Future of SoC Design: As the […]

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ARM-Based SoC Design: Mastering System-Level Modeling

Mar 10, 2025  |  Author : admin_mirabilis
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Architecture Exploration of ARM-based SoC and Chiplets using VisualSim

Revolutionizing ARM-Based SoC Design: Mastering System-Level Modeling with VisualSim Architect The semiconductor landscape is evolving at an unprecedented pace. In an era where ARM-based SoC dominate high-performance computing, efficient system-level modeling has become crucial for experimenting and optimizing superior performance and power optimization. Enter VisualSim Architect—a tool that offers the only architecture models for ARM […]

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New System-Level IP Library for Cadence Tensilica Processors

Feb 20, 2025  |  Author : admin_mirabilis
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Mirabilis Design Accelerates SoC Development with New System-Level IP Library for Cadence Tensilica Processors Mirabilis Design Inc., a leader in system-level IP and simulation solutions, has unveiled a new IP library tailored for Cadence Tensilica processors. This strategic development aims to significantly accelerate System-on-Chip (SoC) design and development processes, offering designers a robust platform for […]

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Arteris FlexNoC and Ncore Network-on-Chip IPs

Feb 17, 2025  |  Author : admin_mirabilis
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Mirabilis Design Adds System-Level Modelling Support for Industry-Standard Arteris FlexNoC and Ncore Network-on-Chip IPs Mirabilis Design Inc., a leader in system-level modeling and simulation solutions, has announced the integration of support for Arteris FlexNoC and Ncore Network-on-Chip (NoC) IPs into its VisualSim Architect tool. This advancement enables designers to perform early-stage architectural exploration and performance […]

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What is Architectural Queueing?

Feb 10, 2025  |  Author : admin_mirabilis
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What is Architectural Queueing? Architectural queueing is an important topic in the sense that queues are needed at the system-level. Queueing theory has been a mathematical concept since the late 1800’s; actually Agner Erlang from Copenhagen, Denmark; https://en.wikipedia.org/wiki/Erlang_distribution; who worked in the telephone industry; developed the first queues!  Architectural queueing handles port operations; whether a […]

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