A9

32-Bit Processor Core

ARM Processor

  • Cortex M0 Microcontrollers
    Architecture model of the energy efficient Arm micro-controllers
  • Cortex M3 Microcontrollers
    Architecture model of the energy efficient Arm micro-controllers
  • Cortex M4 Microcontrollers
    Architecture model of the energy efficient Arm micro-controllers
  • A7
    power-performance model
  • A8
    Highly-optimized for performance and power efficiency
  • A9
    32-bit processor core
  • A53
    Enables Multi-Core power efficient ARMv8 processor
  • A72
    Enables Multi-Core high performance 64-bit ARMv8 processor
  • R4
    Multi-Core 5G baseband SoC processor

Quick Explanation

  • L1 cache 32 KB I, 32 KB D
  • L2 cache 128 KB–8 MB
  • Out-of-order superscalar execution
  • 8-stage pipeline
  • NEON SIMD instruction set extension
  • VFPv3 floating point unit
  • Thumb-2 instruction set
  • Multi-core processing

Protocol

  • ARM Cortex-A9 MPCore is a 32-bit processor core implementing the ARMv7-A architecture. It is a multicore processor providing up to four cache-coherent cores.

Model Link

Implementation of Behaviour Definition, Hardware Architecture & Mapping