A8

Highly-optimized for performance and power efficiency

f

Quick Explanation

  • Dual-issue superscalar design
  • Supports 3 cache execution units
  • Supports multiple memory devices
  • Frequency from 600 MHz to 1 GHz
  • NEON SIMD instruction set extension
  • 13-stage integer pipeline and 10-stage NEON pipeline
  • VFPv3 Floating Point Unit
  • Generates branch prediction
  • Integrated level 2 Cache (0–4 MiB)

Protocol

  • ARM Cortex-A8 is a 32-bit processor core licensed by ARM Holdings implementing the ARMv7-A architecture

Implements Advanced Encryption Standard instruction set on dual ARM 8 platform