Prior blog on peak and average power highlights benefits of reordering device activity to increase Digital System reliability. This blog carries this concept one step further by accumulating task or thread requests to avoid leaving memory in Active state (full power) spread out over time. The type of task or thread determines if this is feasible. For example, a privileged OS instruction needs access to memory immediately to maintain proper OS actions with minimum latency. Similarly, user accesses may be latency critical, as denoted by a higher priority for the request, or a certain memory address range.
If the memory access is not a privileged instruction, or within a certain address range; then this request might be accumulated till a certain number is reached. Then all of these lower priority requests, maybe for email or messages, can be executed one after the other to save power. The latency for these low priority tasks will increase, however, the effect on email or messages will be negligible to the users perception. Next, will discuss central power management vs. distributed power management.